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Jul 2011

Volume 29, Issue 4, Articles (04xxxx)

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J. Vac. Sci. Technol. A 29, 041510 (2011); http://dx.doi.org/10.1116/1.3597636 (5 pages)

Liangmin Wang, Dexing Li, Yuanyuan Hu, and Chao Jiang
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Structural and electrical characterization of HBr/O2 plasma damage to Si substrate

Masanaga Fukasawa, Yoshinori Nakakubo, Asahiko Matsuda, Yoshinori Takao, Koji Eriguchi, Kouichi Ono, Masaki Minami, Fumikatsu Uesawa, and Tetsuya Tatsumi

J. Vac. Sci. Technol. A 29, 041301 (2011); http://dx.doi.org/10.1116/1.3596606 (7 pages) | Cited 1 time

Online Publication Date: 23 June 2011

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Silicon substrate damage caused by HBr/O2 plasma exposure was investigated by spectroscopic ellipsometry (SE), high-resolution Rutherford backscattering spectroscopy, and transmission electron microscopy. The damage caused by H2, Ar, and O2 plasma exposure was also compared to clarify the ion-species dependence. Although the damage basically consists of a surface oxidized layer and underlying dislocated Si, the damage structure strongly depends on the incident ion species, ion energy, and oxidation during air and plasma exposure. In the case of HBr/O2 plasma exposure, hydrogen generated the deep damaged layer (∼10 nm), whereas ion-enhanced diffusion of oxygen, supplied simultaneously by the plasma, caused the thick surface oxidation. In-line monitoring of damage thicknesses by SE, developed with an optimized optical model, showed that the SE can be used to precisely monitor damage thicknesses in mass production. Capacitance–voltage (C–V) characteristics of a damaged layer were studied before and after diluted-HF (DHF) treatment. Results showed that a positive charge is generated at the surface oxide–dislocated Si interface and/or in the bulk oxide after plasma exposure. After DHF treatment, most of the positive charges were removed, while the thickness of the “Si recess” was increased by removing the thick surface oxidized layer. As both the Si recess and remaining dislocated Si, including positive charges, cause the degradation of electrical performance, precise monitoring of the surface structure and understanding its effect on device performance is indispensable for creating advanced devices.
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52.40.Hf Plasma-material interactions; boundary layer effects
52.77.-j Plasma applications
85.30.-z Semiconductor devices
61.05.Np Atom, molecule, and ion scattering (for structure determination only)

Measurement and simulation of spreading current in interlayer dielectric film deposition by plasma-enhanced chemical vapor deposition

Noriaki Matsunaga, Hirokatsu Okumura, Butsurin Jinnai, and Seiji Samukawa

J. Vac. Sci. Technol. A 29, 041302 (2011); http://dx.doi.org/10.1116/1.3596617 (6 pages)

Online Publication Date: 23 June 2011

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A serious issue affecting metal–oxide–semiconductor field-effect transistors is plasma-induced charging damage caused by the spreading current during plasma-enhanced chemical vapor deposition of dielectric films. This current is studied in detail by direct measurement of the plasma-induced vacuum ultraviolet photocurrent through a deposited SiO2 film. The current increased with increasing antenna-wiring spacing, which spreads the electric field over a greater area. Furthermore, the photocurrent showed a parabolic dependence on film thickness. A finite element method simulation demonstrated that the current through a deposited SiO2 film increased when the spreading effect was dominant and decreased when the resistance increase was dominant.
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77.84.Bw Elements, oxides, nitrides, borides, carbides, chalcogenides, etc.
79.60.Dp Adsorbed layers and thin films
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
68.55.aj Insulators
77.55.-g Dielectric thin films
73.61.Ng Insulators

Modeling of plasma-induced damage and its impacts on parameter variations in advanced electronic devices

Koji Eriguchi, Yoshinori Takao, and Kouichi Ono

J. Vac. Sci. Technol. A 29, 041303 (2011); http://dx.doi.org/10.1116/1.3598382 (8 pages)

Online Publication Date: 23 June 2011

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A comprehensive model predicting the effects of plasma-induced damage (PID) on parameter variations in advanced metal–oxide–semiconductor field-effect transistors (MOSFETs) is proposed. The model focuses on the silicon recess structure (Si loss) in the source/drain extension region formed by high-energy ion bombardment during plasma etching. The model includes the following mechanisms: (1) damaged layer formation by ion impact and penetration, (2) Si recess structure formation by a subsequent wet etch, (3) MOSFET performance degradation, and (4) MOSFET parameter variation. Based on a range theory for plasma-etch damage, the thickness of the damaged layer exhibits a power-law dependence on the energy of the ion incident on the surface of Si substrate. Assuming that the damaged layer was formed during a gate or an offset spacer etch process, the depth of Si recess (dR) is a function of the depth profile of the created defect site (ndam), the wet-etch stripping time (tw), and the energy of the incident ion. It was found that dR also showed a power-law dependence on the average ion energy mathion estimated from applied self-dc-bias voltage for various tw. As for MOSFET performance degradation, the threshold voltage (Vth) shifted and the shift (ΔVth) increased with an increase in mathion and a decrease in gate length. This induces an increase in subthreshold leakage current (Ioff) for MOSFET. Technology computer-aided-design simulations were performed to confirm these results. By integrating the presented PID models, parameter variations could be predicted: Using a Monte Carlo method, it was demonstrated that PID increases parameter variations such as Vth and Ioff. It also was found that the variation in mathion induces Vth and Ioff variations, comparable to that induced by other process parameter fluctuations such as dopant fluctuation and gate length. In summary, considering the effects of PID on parameter variations is vital for designing future ultralarge-scale-integrated circuits with billions of built-in MOSFETs.
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85.30.Tv Field effect devices
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