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Jan 2011

Volume 29, Issue 1, Articles (01xxxx)

Issue Cover Spotlight Figure

J. Vac. Sci. Technol. B 29, 010801 (2011); http://dx.doi.org/10.1116/1.3532949 (35 pages)

Gottlieb S. Oehrlein, Raymond J. Phaneuf, and David B. Graves
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Design and focused ion beam fabrication of single crystal diamond nanobeam cavities

Thomas M. Babinec, Jennifer T. Choy, Kirsten J. M. Smith, Mughees Khan, and Marko Lončar

J. Vac. Sci. Technol. B 29, 010601 (2011); http://dx.doi.org/10.1116/1.3520638 (6 pages) | Cited 8 times

Online Publication Date: 10 January 2011

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We present the design and fabrication of nanobeam photonic crystal cavities in single crystal diamond for applications in cavity quantum electrodynamics. First, we describe three-dimensional finite-difference time-domain simulations of a high quality factor (Q ∼ 106) and small mode volume [V ∼ 0.5(λ/n)3] cavity whose resonance corresponds to the zero-phonon transition (637 nm) of the nitrogen-vacancy color center in diamond. This high Q/V structure, which would allow for strong light-matter interaction, is achieved by gradually tapering the size of the photonic crystal holes between the defect center and the mirror regions of the nanobeam. Next, we demonstrate two different focused ion beam (FIB) fabrication strategies to generate thin diamond membranes and nanobeam photonic crystal resonators from a bulk crystal. These approaches include a diamond crystal “side-milling” procedure as well as an application of the “lift-out” technique used in transmission electron microscopy sample preparation. Finally, we discuss certain aspects of the FIB fabrication routine that are a challenge to the realization of the high Q/V designs.
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81.16.-c Methods of micro- and nanofabrication and processing
61.72.jn Color centers
42.70.Qs Photonic bandgap materials

Effects of molecular functionalization sequence on mesoporous silica film properties

Binay Singh, Saurabh Garg, Ashutosh Jain, Richard Moore, and Ganpati Ramanath

J. Vac. Sci. Technol. B 29, 010602 (2011); http://dx.doi.org/10.1116/1.3526146 (4 pages)

Online Publication Date: 11 January 2011

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Functionalizing mesoporous silica (MPS) films with multiple organosilanes is attractive for tailoring stable low permittivity (low k) dielectrics for nanodevice wiring applications. Here, the authors show that the organosilane treatment sequence can have a strong influence on MPS film proper-ties. Films functionalized first with trimethylchlorosilane (TMCS), followed by bis[3-(triethoxysilyl)propyl] tetrasulfide (BTPTS) treatment, exhibit lower k, lower leakage currents, and lower stress compared with films with the functionalization sequence reversed. The observed behavior is due to inhibited water uptake arising from the higher effectiveness of TMCS than BTPTS to passivate silanol groups on pore walls. These findings are relevant in realizing high-stability low k dielectrics for nanodevice wiring.
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68.55.aj Insulators
77.55.Bh Low-permittivity dielectric films
77.22.Ch Permittivity (dielectric function)
61.43.Gt Powders, porous materials
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Plasma-polymer interactions: A review of progress in understanding polymer resist mask durability during plasma etching for nanoscale fabrication

Gottlieb S. Oehrlein, Raymond J. Phaneuf, and David B. Graves

J. Vac. Sci. Technol. B 29, 010801 (2011); http://dx.doi.org/10.1116/1.3532949 (35 pages) | Cited 8 times

Online Publication Date: 14 January 2011

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Photolithographic patterning of organic materials and plasma-based transfer of photoresist patterns into other materials have been remarkably successful in enabling the production of nanometer scale devices in various industries. These processes involve exposure of highly sensitive polymeric nanostructures to energetic particle fluxes that can greatly alter surface and near-surface properties of polymers. The extension of lithographic approaches to nanoscale technology also increasingly involves organic mask patterns produced using soft lithography, block copolymer self-assembly, and extreme ultraviolet lithographic techniques. In each case, an organic film-based image is produced, which is subsequently transferred by plasma etching techniques into underlying films/substrates to produce nanoscale materials templates. The demand for nanometer scale resolution of image transfer protocols requires understanding and control of plasma/organic mask interactions to a degree that has not been achieved. For manufacturing of below 30 nm scale devices, controlling introduction of surface and line edge roughness in organic mask features has become a key challenge. In this article, the authors examine published observations and the scientific understanding that is available in the literature, on factors that control etching resistance and stability of resist templates in plasma etching environments. The survey of the available literature highlights that while overall resist composition can provide a first estimate of etching resistance in a plasma etch environment, the molecular structure for the resist polymer plays a critical role in changes of the morphology of resist patterns, i.e., introduction of surface roughness. Our own recent results are consistent with literature data that transfer of resist surface roughness into the resist sidewalls followed by roughness extension into feature sidewalls during plasma etch is a formation mechanism of rough sidewalls. The authors next summarize the results of studies on chemical and morphological changes induced in selected model polymers and advanced photoresist materials as a result of interaction with fluorocarbon/Ar plasma, and combinations of energetic ion beam/vacuum ultraviolet (UV) irradiation in an ultrahigh vacuum system, which are aimed at the fundamental origins of polymer surface roughness, and on establishing the respective roles of (a) polymer structure/chemistry and (b) plasma-process parameters on the consequences of the plasma-polymer interactions. Plasma induced resist polymer modifications include formation of a thin ( ∼ 1–3 nm) dense graphitic layer at the polymer surface due to ion bombardment and deeper-lying modifications produced by plasma-generated vacuum ultraviolet (VUV) irradiation. The relative importance of the latter depends strongly on initial polymer structure, whereas the ion bombardment induced modified layers are similar for various hydrocarbon polymers. The formation of surface roughness is found to be highly polymer structure specific. Beam studies have revealed a strong ion/UV synergistic effect where the polymer modifications introduced at various depths by ions or ultraviolet/UV photons can interact. A possible fundamental mechanism of initial plasma-induced polymer surface roughness formation has been proposed by Bruce et al. [J. Appl. Phys. 107, 084310 (2010)] . In their work, they measured properties of the ion-modified surface layer formed on polystyrene (PS) polymer surfaces, and by considering the properties of the undamaged PS underlayer, they were able to evaluate the stressed bilayer using elastic buckling theory. Their approach was remarkably successful in reproducing the wavelength and amplitude of measured surface roughness introduced for various ion bombardment conditions, and other variations of experimental parameters. Polymer material-dependent VUV modifications introduced to a depth of about 100 nm can either soften (scission) or stiffen (cross-linking) this region, which produce enhanced or reduced surface roughness.
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81.16.Nd Micro- and nanolithography
81.16.Rf Micro- and nanoscale pattern formation
81.65.Cf Surface cleaning, etching, patterning
85.40.Hp Lithography, masks and pattern transfer
68.35.bm Polymers, organics
61.41.+e Polymers, elastomers, and plastics
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Plasma etching of polydimethylsiloxane: Effects from process gas composition and dc self-bias voltage

Geir Bjørnsen and Jaan Roots

J. Vac. Sci. Technol. B 29, 011001 (2011); http://dx.doi.org/10.1116/1.3521489 (6 pages)

Online Publication Date: 4 January 2011

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Films made of polydimethylsiloxane elastomers have been etched using reactive ion etching. The elastomers are etched using different mixtures of CF4, SF6, and O2 as process gases. The etch rate and profile of the etched area are measured as function of the process pressure for different process gas compositions. At low pressure the highest etch rate is achieved in SF6+O2 plasma. At high pressure the highest etch rate is achieved in CF4+SF6+O2 plasma. The profile of the etched surface is strongly dependent on the process gas composition and the dc bias voltage in the plasma.
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81.65.Cf Surface cleaning, etching, patterning
61.41.+e Polymers, elastomers, and plastics
62.50.-p High-pressure effects in solids and liquids
52.77.Bn Etching and cleaning

Formation of silicon grass: Nanomasking by carbon clusters in cyclic deep reactive ion etching

Steffen Leopold, Christoph Kremin, Angela Ulbrich, Stefan Krischok, and Martin Hoffmann

J. Vac. Sci. Technol. B 29, 011002 (2011); http://dx.doi.org/10.1116/1.3521490 (7 pages)

Online Publication Date: 4 January 2011

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Initial cluster formation on silicon surfaces in cyclic deep reactive ion etching (c-DRIE) using c-C4F8/SF6 plasma is investigated. These clusters act as a nanomask for the fabrication of nanostructured surfaces such as silicon grass. Different wafer preconditioning regimes and subsequent x-ray photoelectron spectroscopy show that no wafer or process contaminations are the reason for nanomasking in c-DRIE. Furthermore, no Si-containing compounds, such as SiFxOy, SiOx, or SiC, are detected. The clusters consist of residues of the fluorinated carbon layer deposited in c-DRIE. Experimental process analysis using design of experiments shows the dependence of nanomask morphology on passivation time and power. The results indicate that the properties of the nanomask, in particular, density, are determined during passivation.
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81.05.Cy Elemental semiconductors
81.07.Bc Nanocrystalline materials
61.46.-w Structure of nanoscale materials
68.35.bg Semiconductors
81.65.Cf Surface cleaning, etching, patterning
81.65.Rv Passivation

Enhanced outcoupling of electroluminescence from ZnS:ErF3 thin films by a photonic crystal

Evan Law, Mark Davidson, Nigel Shepherd, and Paul H. Holloway

J. Vac. Sci. Technol. B 29, 011003 (2011); http://dx.doi.org/10.1116/1.3521494 (7 pages)

Online Publication Date: 4 January 2011

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Enhanced 1550 nm near-infrared emission due to a photonic crystal (PC) in zinc sulfide (ZnS) doped with erbium trifluoride (ErF3) has been studied in sputter deposited alternating current thin film electroluminescent (ACTFEL) devices. The honeycomb structured PC was fabricated into the ZnS:ErF3 layer by electron beam lithography and argon sputtering. A thin film of yttria-stabilized zirconia (YSZ) was deposited into the honeycomb structure of holes, creating the photonic crystal structure with a dielectric constant mismatch between the ZnS:ErF3 layer and the YSZ of approximately 20. The photonic band gaps were modeled for different values of dielectric mismatch and the honeycomb structure hole diameter and lattice spacing. For the 1550 nm wavelength, the lattice constant and hole diameter typically were ∼ 748 and ∼ 342 nm, respectively. The YSZ structured PC ACTFEL device showed a twofold increase in 1550 nm light intensity versus a device without a PC structure. These results could not be explained by classical light scattering. They were attributed to the PC band gaps frustrating propagation modes in the plane of the thin films leading to increased intensity normal to the surface.
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85.60.Jb Light-emitting devices

Deposit profiles characterized by the seed layer in Cu pulse-reverse plating on a patterned substrate

Sung Ki Cho, Myung Jun Kim, Taeho Lim, Oh Joong Kwon, and Jae Jeong Kim

J. Vac. Sci. Technol. B 29, 011004 (2011); http://dx.doi.org/10.1116/1.3521508 (5 pages)

Online Publication Date: 4 January 2011

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The Cu deposit profile from pulse-reverse plating is affected by the characteristics of the Cu seed layer. When a reverse current is applied to a patterned structure, the sidewall Cu film was dissolved preferentially in comparison to the top film. This is associated with the position-dependent film characteristics of a physical vapor deposition (PVD) seed layer. The sidewall seed layer tends to be less dense and has smaller grains than the top seed layer. It was found that a 90°-tilted oblique angle PVD Cu film, which serves as the sidewall seed layer, is less dense and has smaller grains, and is therefore more likely to be dissolved than an untilted film. This preferentiality led to a heavy deposit at the top of the trench in pulse-reverse plating. Thermal pretreatment of the PVD seed layer or electroless deposition of the seed layer help to reduce the preferentiality, and thus the heavy deposition on the trench top that occurs during pulse-reverse plating.
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81.05.Bx Metals, semimetals, and alloys
81.15.Pq Electrodeposition, electroplating
81.40.Gh Other heat and thermomechanical treatments
68.55.at Other materials

Nanoimprint replication of nonplanar nanostructure fabricated by focused-ion-beam chemical vapor deposition

Yuji Kang, Shinya Omoto, Yasuki Nakai, Makoto Okada, Kazuhiro Kanda, Yuichi Haruyama, and Shinji Matsui

J. Vac. Sci. Technol. B 29, 011005 (2011); http://dx.doi.org/10.1116/1.3524289 (5 pages)

Online Publication Date: 4 January 2011

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Nanoimprint lithography (NIL) is a very useful technique for replicating planar nanostructures at low cost with high throughput, but an expansion from planar to nonplanar will probably be required to enhance the functional capabilities of nanodevices. On the other hand, focused-ion-beam chemical vapor deposition (FIB-CVD) is a promising technology for fabricating nonplanar nanostructures. In this study, the authors demonstrated a new nonplanar replication method using a combination of FIB-CVD and NIL to achieve nonplanar replication with submicrometer feature sizes. Furthermore, they replicated nonplanar nanostructures by using step and repeat NIL.
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81.16.Nd Micro- and nanolithography
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
81.07.Bc Nanocrystalline materials

Application of kernel convolution for complementing source mask optimization

Marshal A. Miller, Kenji Yamazoe, and Andrew R. Neureuther

J. Vac. Sci. Technol. B 29, 011006 (2011); http://dx.doi.org/10.1116/1.3524290 (5 pages)

Online Publication Date: 4 January 2011

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Kernel convolution with pattern matching (KCPM) is shown to be an effective complementary fast-computer-aided design tool for post or real-time quantitative assessments of the robustness and richness of the source-mask optimization solution. Compared with rigorous simulation, R2 correlation is shown to be >0.98. A single match takes approximately 40 μs, enabling full chip scale image quality assurance. Additionally, KCPM includes a full complex field interaction and can model any physical behavior that can be represented as a transmission on the mask or as a path difference in the pupil function. Examples are shown for monitoring electromagnetic field effects induced by mask topography through focus for scenarios where the mask pattern is changing and for comparing different source configurations.
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85.40.Hp Lithography, masks and pattern transfer
42.30.Sy Pattern recognition

Investigation of the radiation-induced thermal flexure of an x-ray lithography mask during a tilted exposure

V. Nazmov, E. Reznikova, and J. Mohr

J. Vac. Sci. Technol. B 29, 011007 (2011); http://dx.doi.org/10.1116/1.3524905 (7 pages)

Online Publication Date: 4 January 2011

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Thermal deformations of the x-ray mask were simulated in the case of a synchrotron x-ray spectrum which was modified to decrease the incident power of synchrotron radiation (leaving the electron beam conditions at the storage ring unaltered). Effective methods are (1) the attenuation of the hard component with a grazing incidence x-ray mirror in combination with absorption filters or (2) the use of a central beamstop to suppress the center part of the synchrotron radiation beam where its harder component is concentrated. With a central beamstop combined with absorbing filters, the spectral bandwidth of the x-ray photons absorbed in a resist layer becomes narrower, which decreases the absorbed radiation power. The maximum of the spectral distribution remains at the same position for both variants by using an optimized filter combination. Also the thermal deviation of the microstructures is decreased below 3 μm in the case of an inclined exposure, and the reproducibility of the positioning precision has been demonstrated for tilted deep x-ray lithography with the necessary top and bottom dose ratios for thick SU-8 resist layers.
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85.40.Hp Lithography, masks and pattern transfer

Fabrication of flexible ultracapacitor/galvanic cell hybrids using advanced nanoparticle coating technology

Martin Peckerar, Mahsa Dornajafi, Zeynep Dilli, Neil Goldsman, Yves Ngu, Brent Boerger, Neil Van Wyck, James Gravelin, Brian Grenon, Robert B. Proctor, and Daniel A. Lowy

J. Vac. Sci. Technol. B 29, 011008 (2011); http://dx.doi.org/10.1116/1.3524906 (6 pages) | Cited 1 time

Online Publication Date: 4 January 2011

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Ultracapacitors represent an essential storage element in a variety of hybrid energy sources, ranging from automobile power systems to low-power motes in a distributed sensor network. Hydrated ruthenium (IV) oxide has demonstrated superior performance in terms of energy storage density (over 25 W h kg−1) as compared to other material systems. The cost of the oxide has been, however, a major impediment to the widespread use of this technology. In this article, the authors report on the fabrication of ruthenium (IV) oxide based ultracapacitor/galvanic cell hybrids made with a coating system capable of providing continuous, densely packed (but porous) layers of the nanoparticles with the thickness of one single nanoparticle.
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82.47.Uv Electrochemical capacitors; supercapacitors
84.32.Tt Capacitors
84.60.Ve Energy storage systems, including capacitor banks

Dual-sputtered process sensitivity of HfGdO charge-trapping layer in SONOS-type nonvolatile memory

Jer-Chyi Wang, Pai-Chi Chou, Chao-Sung Lai, and Li-Chi Liu

J. Vac. Sci. Technol. B 29, 011009 (2011); http://dx.doi.org/10.1116/1.3527011 (5 pages) | Cited 1 time

Online Publication Date: 4 January 2011

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The charge-trapping layer of HfGdO dielectrics deposited by a dual-sputtered process for a silicon-oxide-nitride-oxide-silicon-type nonvolatile memory application was investigated. Different Ar/O2 flow ratios and Hf/Gd dual-sputtered power ratios were performed and the process sensitivity on the memory characteristics was analyzed. It is observed that the nonstoichiometric GdO (200) structure may be the main charge-trapping site for the HfGdO silicon-oxide-nitride-oxide-silicon-type memories. The memories with Hf/Gd = 150/150 and Ar/O2 = 20/5 exhibit better electrical performance than others and can be applied into future nonvolatile memory.
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81.15.Cd Deposition by sputtering
77.84.Bw Elements, oxides, nitrides, borides, carbides, chalcogenides, etc.
77.55.-g Dielectric thin films
68.55.aj Insulators
84.30.Sk Pulse and digital circuits

Accuracy of thickness measurement for Ge epilayers grown on SiGe/Ge/Si(100) heterostructure by x-ray diffraction and reflectivity

Xue-Chao Liu, M. Myronov, A. Dobbie, Van H. Nguyen, and D. R. Leadley

J. Vac. Sci. Technol. B 29, 011010 (2011); http://dx.doi.org/10.1116/1.3530594 (5 pages) | Cited 1 time

Online Publication Date: 4 January 2011

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High-resolution x-ray diffraction rocking curve (RC), x-ray reflectivity (XRR), and transmission electron microscopy (TEM) were used to characterize strained Ge epilayers grown on relaxed SiGe/Ge/Si(100) virtual substrates by reduced pressure chemical vapor deposition. The investigation focused on the reliability and accuracy of thickness measurement by these different techniques. The authors found that both XRR and RC could give reliable values that agree well with TEM results over a wide range of Ge epilayer thicknesses. The best-fit thickness from both XRR and RC is within ±5% of the TEM measurement for a thickness in the range of 10–120 nm, with XRR producing more accurate values than RC. However, neither RC nor XRR could give reliable results for very thin Ge epilayers (<7 nm) because of the complicated heterostructure and interface/surface quality. Agreement is also not as good for the thickest Ge epilayers (>122 nm) due to surface roughening caused by strain relaxation.
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06.30.Bp Spatial dimensions (e.g., position, lengths, volume, angles, and displacements)
68.60.Bs Mechanical and acoustical properties
68.35.Ct Interface structure and roughness
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
68.55.ag Semiconductors
81.05.Cy Elemental semiconductors

Improvement of contact resistance between carbon nanotubes and metal electrodes for high performance electronics

Yoojin Song and Seong Jun Kang

J. Vac. Sci. Technol. B 29, 011011 (2011); http://dx.doi.org/10.1116/1.3520436 (3 pages)

Online Publication Date: 5 January 2011

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The authors developed a simple method that allows control of contact resistance between random network carbon nanotubes (CNTs) and metals such as gold and palladium to facilitate the development of high performance electronics on plastic substrates. The approach involves the deposition of a small amount of aluminum between random network CNTs and metal electrodes during the device fabrication process. The contact resistances of the resulting devices were measured, which showed that devices containing a thin layer of aluminum have lower contact resistances (Au: 1.086 kΩ μm and Pd: 2.282 kΩ μm) than devices without the layer (Au: 6.841 kΩ μm and Pd: 7.515 kΩ μm).
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73.40.Cg Contact resistance, contact potential
73.63.Fg Nanotubes
85.35.Kt Nanotube devices

13 nm high-efficiency nickel-germanium soft x-ray zone plates

Julia Reinspach, Magnus Lindblom, Michael Bertilson, Olov von Hofsten, Hans M. Hertz, and Anders Holmberg

J. Vac. Sci. Technol. B 29, 011012 (2011); http://dx.doi.org/10.1116/1.3520457 (4 pages) | Cited 1 time

Online Publication Date: 5 January 2011

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Zone plates are used as objectives for high-resolution x-ray microscopy. Both high resolution and high diffraction efficiency are crucial parameters for the performance of the lens. In this article, the authors demonstrate the fabrication of high-resolution soft x-ray zone plates with improved diffraction efficiency by combining a nanofabrication process for high resolution with a process for high diffraction efficiency. High-resolution Ni zone plates are fabricated by applying cold development of electron-beam-patterned ZEP 7000 in a trilayer-resist process combined with Ni-electroplating. High-diffraction-efficiency Ni–Ge zone plates are realized by fabricating the Ni zone plate on a Ge film and then using the finished zone plate as etch mask for anisotropic CHF3 reactive ion etching into the underlying Ge, resulting in a Ni–Ge zone plate with improved aspect ratio and zone plate efficiency. Ni–Ge zone plates with 13 nm outermost zone width composed of 35 nm Ni on top of 45 nm Ge were fabricated. For comparable Ni and Ni–Ge zone plates with an outermost zone width of 15 nm, the diffraction efficiency was measured to be 2.4% and 4.3%, respectively, i.e., an enhancement of a factor of 2.
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07.85.Fv X- and γ-ray sources, mirrors, gratings, and detectors
07.85.Tt X-ray microscopes
07.85.Jy Diffractometers
42.79.Ci Filters, zone plates, and polarizers

Mechanistic considerations of low temperature hydrogen-based plasma etching of Cu

Fangyu Wu, Galit Levitin, and Dennis W. Hess

J. Vac. Sci. Technol. B 29, 011013 (2011); http://dx.doi.org/10.1116/1.3520461 (7 pages) | Cited 2 times

Online Publication Date: 5 January 2011

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A simple plasma-based, low temperature etch process is described, which allows subtractive etching of copper (Cu) films and thereby offers an alternative to damascene technology for microelectronic and integrated circuit device fabrication. Hydrogen (H2)-based plasma etching of blanket and SiO2 masked Cu thin films is performed in an inductively coupled plasma reactor at temperatures below room temperature. This process achieves anisotropic Cu features and an etch rate of ∼ 13 nm/min. Although Ar and He are more efficient sputter gases, Cu etching in these plasma atmospheres displays lower etch rates than those observed with H2 plasmas. Moreover, anisotropy degraded with enhanced ion bombardment due to mask ablation. Cu etch rate and patterning results are consistent with an etch process that involves both chemical and physical characteristics. Specifically, the combination of ultraviolet photon impingement, ion bombardment, and hydrogen interaction with Cu surfaces appears to be responsible for the efficient removal of Cu in low temperature H2-based plasma environments.
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81.65.Cf Surface cleaning, etching, patterning
79.20.Rf Atomic, molecular, and ion beam impact and interactions with surfaces
61.80.Ba Ultraviolet, visible, and infrared radiation effects (including laser radiation)
61.80.Jh Ion radiation effects
61.82.Bg Metals and alloys

Damage immune field effect transistors with vacuum gate dielectric

Jin-Woo Han, Jae-Hyuk Ahn, and Yang-Kyu Choi

J. Vac. Sci. Technol. B 29, 011014 (2011); http://dx.doi.org/10.1116/1.3520618 (4 pages)

Online Publication Date: 5 January 2011

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A damage immune field effect transistor with a vacuum gate dielectric is presented. The device consists of a suspended silicon nanowire and an independently controlled double-gate. The vacuum gate dielectric with a thickness of 20 nm is formed by a sacrificial layer deposition and removal process. The vacuum gate dielectric is found to be resistant to radiation-induced damage. Furthermore, it shows a very high tolerance against hot-carrier stress. The excellent stability in the radiative environment and high electric field is attributed to the absence of material in the vacuum gate dielectric.
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85.30.Tv Field effect devices

Compact holographic lithography system for photonic-crystal structure

Mei-Li Hsieh and Shawn-Yu Lin

J. Vac. Sci. Technol. B 29, 011015 (2011); http://dx.doi.org/10.1116/1.3522658 (6 pages)

Online Publication Date: 5 January 2011

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The authors report the design and a successful implementation of a compact holographic lithography system for fabricating a variety of two-dimensional photonic-crystal structures. In the authors’ optical system, apertures, prisms, and polarizers for multibeam control are well integrated, leading to a stable and reliable system. The path lengths of the multiple beams, which form the interference pattern, are set to be the same. Consequently, the authors’ setup can generate a high contrast interference pattern and, hence, a high quality photoresist exposure of photonic crystals. In this article, the desirable parameters of the authors’ optical system will be discussed. Photonic-crystal templates with different lattice periods and lattice symmetries recorded in the photoresist will also be illustrated.
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42.82.Cr Fabrication techniques; lithography, pattern transfer
42.70.Qs Photonic bandgap materials
42.79.Bh Lenses, prisms and mirrors
42.79.Ci Filters, zone plates, and polarizers
42.40.Kw Holographic interferometry; other holographic techniques
42.40.My Applications

High verticality InP/InGaAsP etching in Cl2/H2/Ar inductively coupled plasma for photonic integrated circuits

John S. Parker, Erik J. Norberg, Robert S. Guzzon, Steven C. Nicholes, and Larry A. Coldren

J. Vac. Sci. Technol. B 29, 011016 (2011); http://dx.doi.org/10.1116/1.3522659 (5 pages) | Cited 3 times

Online Publication Date: 5 January 2011

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High verticality and reduced sidewall deterioration of InP/InGaAsP in Cl2/H2/Ar inductively coupled plasma etching is demonstrated for a hydrogen dominant gas mixture. Selectivity >20:1, an etch rate of 24 nm/s, and a sidewall slope angle of >89° have been measured for etch depths >7 μm. The Ar flow is minimized to reduce surface etch damage while increased Cl2 and H2 gas flow is shown to increase etch rate and selectivity. The high chamber pressure required for plasma ignition causes isotropic etching at the start and creates an undercut beneath the masking layer. A novel ignition scheme using a hydrogen gas “flood” is suggested and results are presented.
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81.65.Cf Surface cleaning, etching, patterning
52.77.Bn Etching and cleaning

Transparent semiconducting Nb-doped anatase TiO2 films deposited by helicon-wave-excited-plasma sputtering

A. Fouda, K. Hazu, M. Haemori, T. Nakayama, A. Tanaka, and S. F. Chichibu

J. Vac. Sci. Technol. B 29, 011017 (2011); http://dx.doi.org/10.1116/1.3525918 (6 pages) | Cited 1 time

Online Publication Date: 5 January 2011

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The authors report stoichiometry control and postdeposition annealing-free fabrication of Nb-doped transparent anatase TiO2 (A-TiO2:Nb) films on alkaline-free glass substrates by helicon-wave-excited-plasma sputtering. The films tended to crystallize in the stable electrically semi-insulating rutile phase. However, although the appropriate deposition condition window was narrow, precise stoichiometry control using near-reducing ambient, namely, the deposition temperature higher than 450 °C and O2 partial pressure (PO2) in the range between 5×10−4 and 1×10−2 Pa, enabled the deposition of a high refractive index semiconducting anatase phase. The electron concentration of the A-TiO2:Nb films increased with increasing Nb concentration up to Ti0.907Nb0.093O2. The results indicate that the Nb5+ donor on the Ti4+ site can be activated under near-reducing atmosphere where unwanted compensating defects may be passivated. As a result, anatase Ti0.907Nb0.093O2 film deposited at 500 °C and PO2 = 5×10−4 Pa exhibited a resistivity of 3.4×10−3 Ω cm and an optical transmittance higher than 90%. The refractive index of A-TiO2:Nb was found to be approximately 2.63 at 450 nm with spectroscopic ellipsometry, which is comparable to the InGaN alloys.
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68.55.ag Semiconductors
78.20.Ci Optical constants (including refractive index, complex dielectric constant, absorption, reflection and transmission coefficients, emissivity)
78.66.Li Other semiconductors
73.61.Le Other inorganic semiconductors
52.77.Dq Plasma-based ion implantation and deposition
81.15.Cd Deposition by sputtering

Residue growth on metallic hard mask after dielectric etching in fluorocarbon based plasmas. II. Solutions

N. Posseme, R. Bouyssou, T. Chevolleau, T. David, V. Arnal, M. Darnon, Ph. Brun, C. Verove, and O. Joubert

J. Vac. Sci. Technol. B 29, 011018 (2011); http://dx.doi.org/10.1116/1.3527073 (10 pages)

Online Publication Date: 5 January 2011

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Metallic hard mask architecture becomes an integration of choice for an advanced back end of the line interconnect technology node. However, one of the main integration issues is the growth of residue (titanium based compounds) after dielectric etching. In this article, the authors study the efficiency of different in situ postetch plasma treatments such as hydrogen, oxygen, and methane based plasmas, which are investigated in order to prevent the residue formation. The efficiency of those plasma treatments is demonstrated for a C045 dual-damascene level technology using a trench first hard mask integration with a porous SiOCH dielectric (porosity of 25%, k = 2.5, deposited by plasma enhanced chemical vapor deposition). The authors show that they strongly improve the yield after a 1 day air exposure. Complementary x-ray photoelectron spectroscopy analyses performed on blanket titanium nitride wafers revealed that oxygen or hydrogen based plasmas act on the kinetics of residue formation by removing the fluorine species concentration on top of the titanium nitride layer. On the other hand, with methane based chemistry, the formation of a carbon and nitrogen based passivation layer on top of the titanium nitride layer prevents a reaction with air moisture and thus leads to a residue free surface. The authors also show that the methane based in situ postetch treatment presents superior efficiency than any other investigated chemistries since its efficiency to limit residue growth is independent of fluorocarbon etching process conditions.
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81.05.Rm Porous materials; granular materials
81.65.Cf Surface cleaning, etching, patterning
81.65.Rv Passivation
82.80.Pv Electron spectroscopy (X-ray photoelectron (XPS), Auger electron spectroscopy (AES), etc.)
79.60.Bm Clean metal, semiconductor, and insulator surfaces
52.77.Bn Etching and cleaning

Thick benzocyclobutene etching using high density SF6/O2 plasmas

Qianwen Chen, Dingyou Zhang, Zhimin Tan, Zheyao Wang, Litian Liu, and Jian-Qiang Lu

J. Vac. Sci. Technol. B 29, 011019 (2011); http://dx.doi.org/10.1116/1.3532828 (6 pages)

Online Publication Date: 5 January 2011

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Etching of thick nonphotosensitive benzocyclobutene (BCB) was investigated using a high density SF6/O2 plasma with an inductively coupled plasma (ICP) etcher. The effects of SF6 concentration on etching characteristics, including etching rate, anisotropy, and residue, are fully discussed in this article. Moreover, experiments were designed and carried out to study the causes of BCB etching residue. A grasslike etching residue was observed for low SF6 concentration at the bottom of BCB patterns with a SiO2/SixN layer and the BCB patterns cured on a N2-purged hotplate, while residue-free etching is obtained for the BCB patterns cured in a N2-purged vacuum chamber. A high SF6 concentration and exclusion of O2 during hard curing are important to prevent the grasslike etching residue. A highly anisotropic and residue-free etching of thick ( ∼ 13 μm) BCB is achieved for BCB cured in a N2-purged vacuum chamber at 250 °C for 1 h and with a pure SF6 plasma under etching conditions of 700 W ICP power, 100 W reactive ion etching power, 15 mTorr chamber pressure, and 50 SCCM (SCCM denotes cubic centimeter per minute at STP) gas flow. Mechanisms for the dependence of the etching characteristics on SF6 concentration are discussed.
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81.65.Cf Surface cleaning, etching, patterning
52.77.Bn Etching and cleaning

Influence of pH and abrasive concentration on polishing rate of amorphous Ge2Sb2Te5 film in chemical mechanical polishing

Zefang Zhang, Weili Liu, and Zhitang Song

J. Vac. Sci. Technol. B 29, 011020 (2011); http://dx.doi.org/10.1116/1.3532980 (5 pages) | Cited 2 times

Online Publication Date: 5 January 2011

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This study explores the effect of pH and abrasive concentration on the chemical mechanical polishing (CMP) of blank amorphous Ge2Sb2Te5 (GST) film using the colloidal silica-based slurry. It was found that material removal rate (MRR) strongly depends on the pH and abrasive concentration. When using only pH adjusted de-ionized water, the MRR decreases as the pH was raised or lowered toward neutral, which indicates that chemical effects dominate in the polishing rates. However, electrostatic interactions between the abrasive particles and the surface of GST control the polishing rate with the variation in pH when the silica-based slurry was used. In addition, MRR was proportional to abrasive concentration and MRR per abrasive particle was calculated to explain the effect of abrasive concentration on GST CMP. With the variation of abrasive concentration, MRR is strongly correlated with coefficient of friction.
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81.65.Ps Polishing, grinding, surface finishing
81.40.Pq Friction, lubrication, and wear
62.20.Qp Friction, tribology, and hardness
82.45.Vp Semiconductor materials in electrochemistry
82.70.Dd Colloids
82.70.Kj Emulsions and suspensions

Molecularly selective nanopatterns using nanoimprint lithography: A label-free sensor architecture

Daniel Forchheimer, Gang Luo, Lei Ye, and Lars Montelius

J. Vac. Sci. Technol. B 29, 011021 (2011); http://dx.doi.org/10.1116/1.3527080 (5 pages)

Online Publication Date: 6 January 2011

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Nanoimprint lithography (NIL) can generate well defined nanostructures with high efficiency and at very low cost. Molecular imprinting (MIP) is a “bottom-up” technique creating a polymer layer exhibiting structures with a molecular selectivity. Such polymer structures may be employed as molecular recognition sites for sensing applications. In this work, the authors combine NIL with MIP and they are able to obtain micro- and nanopatterns of polymer with features down to 100 nm that show high molecular selectivity.
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81.16.Rf Micro- and nanoscale pattern formation
81.16.Nd Micro- and nanolithography
85.85.+j Micro- and nano-electromechanical systems (MEMS/NEMS) and devices
07.07.Df Sensors (chemical, optical, electrical, movement, gas, etc.); remote sensing
82.80.-d Chemical analysis and related physical methods of analysis

Compensation methods for buried defects in extreme ultraviolet lithography masks

Chris H. Clifford, Tina T. Chan, and Andrew R. Neureuther

J. Vac. Sci. Technol. B 29, 011022 (2011); http://dx.doi.org/10.1116/1.3531927 (6 pages) | Cited 2 times

Online Publication Date: 11 January 2011

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Two methods will be presented to compensate for buried defects in patterned extreme ultraviolet (EUV) masks. The goal of the methods in this work is to prescribe modifications to the absorber pattern on an EUV mask with a buried defect so that the final image printed on the wafer matches the intended pattern through focus. The first method uses precalculated design curves to determine the required absorber modification for a given defect. This method is able to compensate for a defect in focus, but not through focus. A second method is presented, covering the defect with absorber that reduces the effect of the defect through focus. Both of these methods are studied with simulation in this work and are equally applicable to pit and bump defects.
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85.40.Hp Lithography, masks and pattern transfer

Scalable nanoimprint patterning of thin graphitic oxide sheets and in situ reduction

Yeong-Yuh Lee, Karen S. L. Chong, Seok-Hong Goh, Andrew M. H. Ng, Madanagopal V. Kunnavakkam, Chiou-Liu Hee, Yanping Xu, Hosea Tantang, Ching-Yuan Su, and Lain-Jong Li

J. Vac. Sci. Technol. B 29, 011023 (2011); http://dx.doi.org/10.1116/1.3533936 (5 pages) | Cited 1 time

Online Publication Date: 11 January 2011

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This article presents a scalable technique to precisely deposit and pattern graphitic oxide (GO) flakes onto a SiO2/Si or glass substrate. A blanket coating of GO was first applied from a colloidal solution onto an amine-functionalized SiO2/Si substrate. The amine termination was used to enhance the adhesion of GO sheets to the substrate. A poly(methyl methacrylate) (PMMA) etch mask was patterned via nanoimprint lithography on top of the GO coating. An oxygen plasma etch was then used to remove GO from areas unprotected by the PMMA mask. The PMMA mask was then dissolved by solvent lift-off technique leaving behind GO lines. GO lines down to 250 nm have been demonstrated. Reduction in hydrazine, followed by annealing in hydrogen ambient, increases the conductivity of the patterned GO lines. This technique can enable large-scale fabrication of electronic devices and sensors based on patterned GO sheets.
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81.16.Rf Micro- and nanoscale pattern formation
81.16.Nd Micro- and nanolithography
81.65.Cf Surface cleaning, etching, patterning
52.77.Bn Etching and cleaning
81.07.Bc Nanocrystalline materials
81.40.Gh Other heat and thermomechanical treatments
73.61.Ng Insulators

Poly-Si/TiN/Mo/HfO2 gate stack etching in high-density plasmas

O. Luere, E. Pargon, L. Vallier, and O. Joubert

J. Vac. Sci. Technol. B 29, 011024 (2011); http://dx.doi.org/10.1116/1.3533939 (9 pages) | Cited 2 times

Online Publication Date: 11 January 2011

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Plasma etching of thin Mo layer integrated in a poly-Si/TiN/Mo/HfO2 gate stack is investigated using various halogen based plasma chemistries. Preliminary studies of Mo film etching show that SF6/Ar, HBr/O2, and Cl2/O2 plasmas lead to spontaneous chemical etching of the molybdenum layer through the formation of volatile MoFX, MoOXClY, or MoOXBrY by-products, while Mo etching in Cl2 and SF6/CH2F2 plasmas requires the assistance of the ion bombardment. High Mo:HfO2 selectivity can be tuned in HBr/O2 and Cl2/O2 plasmas as a function of O2 concentration in the gas mixture and bias power, while SF6/CH2F2/Ar plasma leads to the formation of HfF residues. Subsequent patterning studies of the poly-Si/TiN/Mo/HfO2 gate stack show that HBr/O2 plasmas are the most promising to achieve anisotropic Mo etching without impacting the poly-Si/TiN sidewalls while keeping identical dense and isolated gate profiles. All results indicate that the gate etch anisotropy is driven by the redeposition and subsequent oxidation of MoOBrX etch by-products on the pattern sidewalls. The O2 concentration in the plasma gas phase controls the passivation layer thickness.
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81.65.Cf Surface cleaning, etching, patterning
81.65.Mq Oxidation
81.65.Rv Passivation
52.77.Bn Etching and cleaning

Interconnected alternating-current light-emitting diode arrays isolated by laser micromachining

Giuseppe Y. Mak, Edmund Y. Lam, and H. W. Choi

J. Vac. Sci. Technol. B 29, 011025 (2011); http://dx.doi.org/10.1116/1.3533949 (4 pages)

Online Publication Date: 11 January 2011

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The fabrication and operation of a monolithic InGaN alternating-current light-emitting diode (LED) based on the bridge rectifier design are demonstrated. The device consists of on-chip interconnected LED elements that have been isolated by direct-write laser micromachining, a powerful tool well-suited for rapid device prototyping. The effects of capacitors coupled to the dc path of the rectifier have been investigated. Although an increase of radiant flux can be achieved through capacitive voltage smoothening, the wall-plug efficiency drops as a result. The device can be applied to 12 Vrms lighting applications.
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85.60.Jb Light-emitting devices
85.40.-e Microelectronics: LSI, VLSI, ULSI; integrated circuit fabrication technology

Characterization of damage induced by FIB etch and tungsten deposition in high aspect ratio vias

Yariv Drezner, Daniel Fishman, Yuval Greenzweig, and Amir Raveh

J. Vac. Sci. Technol. B 29, 011026 (2011); http://dx.doi.org/10.1116/1.3539204 (7 pages)

Online Publication Date: 11 January 2011

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In this paper we studied three major issues that have challenged focused ion beam (FIB) circuit edit practices: via overetching, via composition which affects via resistance, and uniformity of via fill. These issues may become critical as minimal circuit dimensions reduce in the future. We investigated the amorphization induced by FIB gas assisted etch and ion beam induced metal deposition in high aspect ratio vias, using bright and dark field transmission electron microscopy images. A simple intuitive model is introduced to explain the differences in amorphization layer thicknesses between the steep FIB via sidewalls and the via floor. We analyze the dependence of FIB via purity on depth using EDS. Directions for future FIB applications are discussed in the paper along with a FIB via fill strategy.
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81.65.Cf Surface cleaning, etching, patterning
81.15.Jj Ion and electron beam-assisted deposition; ion plating
82.80.Ej X-ray, Mössbauer, and other γ-ray spectroscopic analysis methods

Nanoscale depth-resolved electronic properties of SiO2/SiOx/SiO2 for device-tolerant electronics

E. J. Katz, Z. Zhang, H. L. Hughes, K. -B. Chung, G. Lucovsky, and L. J. Brillson

J. Vac. Sci. Technol. B 29, 011027 (2011); http://dx.doi.org/10.1116/1.3543712 (7 pages) | Cited 2 times

Online Publication Date: 14 January 2011

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We have used nanoscale depth-resolved cathodoluminescence spectroscopy (DRCLS) of device-tolerant oxides to measure the energy levels and spatial distribution of defects within nanocrystalline grains in an α-SiO2 matrix that counteract hole trapping and reduce CMOS transistor degradation due to ionizing radiation. DRCLS of 58 nm SiO2/SiOx/SiO2 oxide structures distinguishes spatially and electronically between the intrinsic SiO2 and SiOx-related defects. Annealing the α-SiO2 oxide produces nanocrystalline Si grain formation that increases the concentration of defects 0.3 eV above the Si valence band that can trap electrons and block radiolytic proton transport. This study validates a carrier trapping mechanism for phase-separated device-tolerant SiOx oxide layers.
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71.20.Ps Other inorganic compounds
78.60.Hk Cathodoluminescence, ionoluminescence
78.67.Bf Nanocrystals, nanoparticles, and nanoclusters
81.40.Gh Other heat and thermomechanical treatments
64.75.Jk Phase separation and segregation in nanoscale systems
72.20.Jv Charge carriers: generation, recombination, lifetime, and trapping

Etch mechanisms of silicon gate structures patterned in SF6/CH2F2/Ar inductively coupled plasmas

O. Luere, E. Pargon, L. Vallier, B. Pelissier, and O. Joubert

J. Vac. Sci. Technol. B 29, 011028 (2011); http://dx.doi.org/10.1116/1.3522656 (10 pages)

Online Publication Date: 14 January 2011

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Patterning complex metal gate stack becomes increasingly challenging since the gate dimension for all isolated as well as dense gate structures present on 300 mm wafer needs to be controlled within the nanometer range. In this article, the authors show that SF6/CH2F2/Ar plasma chemistries to etch the polysilicon gate present very interesting critical dimension (CD) control capabilities for advanced gate etch strategies compared to commonly used HBr/O2/Cl2 plasma chemistries, thanks to the different mechanisms involved in the passivation layer formation on the gate sidewalls. Indeed, contrary to HBr/Cl2/O2 plasma chemistries, the passivation layers in SF6/Ar/CH2F2 plasmas are not formed from deposition of etch by-products coming from the gas phase but the passivating species are chemically sputtered from the bottom of the etched structures and coat the silicon sidewalls by line of sight deposition. Such mechanisms result in thin and uniform CFX passivation layers on the gate sidewalls very similar in dense and isolated structures leading to an improved CD control.
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81.65.Cf Surface cleaning, etching, patterning
81.65.Rv Passivation
82.33.Xj Plasma reactions (including flowing afterglow and electric discharges)
82.80.-d Chemical analysis and related physical methods of analysis

Control of semiconductor quantum dot nanostructures: Variants of SixGe1−x/Si quantum dot molecules

Jessica K. Murphy, Robert Hull, Devin Pyle, Hao Wang, Jennifer Gray, and Jerrold Floro

J. Vac. Sci. Technol. B 29, 011029 (2011); http://dx.doi.org/10.1116/1.3533938 (5 pages) | Cited 1 time

Online Publication Date: 14 January 2011

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We examine variations in the basic structure of quantum dot molecules (fourfold quantum dot nanostructures forming around a central facetted pit) in the SixGe1−x/Si(100) system. Arrays of quantum dot molecules are seeded by Ga+ focused ion beam (FIB) prepatterning of the Si substrate prior to epitaxial Si buffer layer growth and GexSi1−x film deposition. Five main variants to the regular quantum dot molecule structure are observed. The populations of these variant structures depend on the initial FIB processing conditions; their frequencies generally increase with increasing prepatterned pit depth and with increasing incident ion energy. This work suggests both routes to improving uniformity of regular quantum dot molecule arrays as well as routes to enabling synthesis of a wider range of nanostructure geometries.
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81.07.Ta Quantum dots
68.55.ag Semiconductors
81.15.Hi Molecular, atomic, ion, and chemical beam epitaxy
81.16.Rf Micro- and nanoscale pattern formation

Inhibition of carbon growth and removal of carbon deposits on extreme ultraviolet lithography mirrors by extreme ultraviolet irradiation in the presence of water, oxygen, or oxygen/ozone mixtures

Masahito Niibe, Keigo Koida, and Yukinobu Kakutani

J. Vac. Sci. Technol. B 29, 011030 (2011); http://dx.doi.org/10.1116/1.3533945 (5 pages) | Cited 1 time

Online Publication Date: 14 January 2011

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Experiments involving the inhibition of carbon growth and removal of carbon deposits on extreme ultraviolet (EUV) lithography mirrors were carried out. First, a carbon film was deposited on a Ru-capped Mo/Si multilayer mirror by introducing n-decane gas at a pressure of 1.3×10−5 Pa into the vacuum chamber and irradiating this mirror with an EUV dose of 380 J/mm2. Following, the mirror was further exposed to EUV irradiation while introducing water vapor, oxygen, or oxygen/ozone mixtures at a gas pressure of 1.0×10−2 Pa into the chamber. The reflectivity of the mirror, which was decreased upon carbon-film growth, could be recovered by the introduction of oxygen or oxygen/ozone mixtures. In the inhibition experiment, EUV irradiation was carried out while introducing n-decane gas at a pressure of 1.3×10−5 Pa and, simultaneously, water vapor, oxygen, or oxygen/ozone mixtures with a pressure of about 1×10−2 Pa. No remarkable inhibition of carbon-film growth was observed for water vapor and oxygen gas. However, a definite inhibition was observed with the introduction of oxygen/ozone mixtures.
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81.65.Cf Surface cleaning, etching, patterning
42.79.Bh Lenses, prisms and mirrors
61.80.Ba Ultraviolet, visible, and infrared radiation effects (including laser radiation)

Quantitative simulation of ion-beam induced deposition of nanostructures

Christoph Ebm, Gerhard Hobler, Simon Waid, and Heinz D. Wanzenboeck

J. Vac. Sci. Technol. B 29, 011031 (2011); http://dx.doi.org/10.1116/1.3533951 (5 pages) | Cited 3 times

Online Publication Date: 18 January 2011

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Gas-assisted etching and deposition with focused ion beams are unique and flexible methods for the fabrication of nanostructures. To understand and improve these processes the ability to accurately simulate and predict the resulting structures is very important. In this paper we present a nonlocal recoil-based algorithm for topography simulation of ion-beam induced gas-assisted deposition. We have fabricated flying roof like overhanging structures and found very good agreement between simulation and experiment. These structures cannot be explained with a local model. Furthermore, we demonstrate a considerable influence of the beam diameter on the resulting structure by comparing otherwise identical simulations with different beam diameter.
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81.15.Jj Ion and electron beam-assisted deposition; ion plating
61.46.Df Structure of nanocrystals and nanoparticles ("colloidal" quantum dots but not gate-isolated embedded quantum dots)
81.15.Cd Deposition by sputtering
81.16.-c Methods of micro- and nanofabrication and processing

Performance characteristics of GaN-based light-emitting diodes fabricated with AgNi, AgCu, and AgAl-alloy reflectors

Hyunsoo Kim and Sung-Nam Lee

J. Vac. Sci. Technol. B 29, 011032 (2011); http://dx.doi.org/10.1116/1.3539234 (5 pages) | Cited 2 times

Online Publication Date: 18 January 2011

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We report on the performance characteristics of GaN-based light-emitting diodes (LEDs) fabricated with Ag-alloy p-type reflectors including AgNi, AgCu, and AgAl. Compared to the reference LEDs fabricated with Ag, LEDs fabricated with AgNi and AgCu produced smaller forward voltages and higher light output power. Under optimized thermal annealing conditions, the forward voltages obtained were 3.56, 3.29, 3.28, and 3.44 V, the light output powers were 14.38, 15.73, 14.40, and 12.77 mW, and the power efficiencies were 20.2%, 23.91%, 21.95%, and 18.45% for LEDs fabricated with Ag, AgNi, AgCu, and AgAl, respectively. The surface morphology of Ag-alloy was also found to be smoother than that of Ag, suggesting that Ag-alloy reflectors, particularly AgNi, are very promising for practical applications.
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85.60.Jb Light-emitting devices

Vision-based approach to automated analysis of structure boundaries in scanning electron microscope images

Nak H. Kim and Soo-Young Lee

J. Vac. Sci. Technol. B 29, 011033 (2011); http://dx.doi.org/10.1116/1.3536505 (6 pages)

Online Publication Date: 21 January 2011

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In this article, a vision-based approach is presented for the automatic measurement of feature dimensions from cross-section scanning electron microscope images of three-dimensional structures. The cross-sections of fabricated structures are represented by a set of boundary points. The geometric distortion incurred during the imaging process is compensated for by matching the cross-section of a target structure to that of the fabricated one. Control points are defined on the boundary of the target structure, and their locations in the cross-section image are estimated using line fitting. The feature dimensions are measured based on the control points. The proposed automatic analysis method has been successfully applied to measuring dimensions of sawtooth and staircase structures transferred onto resist.
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07.78.+s Electron, positron, and ion microscopes; electron diffractometers

Fabrication of trench nanostructures for extreme ultraviolet lithography masks by atomic force microscope lithography

Gwangmin Kwon, Kyeongkeun Ko, Haiwon Lee, Woongsun Lim, Geun Young Yeom, Sunwoo Lee, and Jinho Ahn

J. Vac. Sci. Technol. B 29, 011034 (2011); http://dx.doi.org/10.1116/1.3534025 (5 pages) | Cited 1 time

Online Publication Date: 25 January 2011

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We describe methods to fabricate extreme ultraviolet lithography (EUVL) absorber mask patterns by atomic force microscope (AFM) lithography and inductively coupled plasma (ICP) etching. AFM lithography, based on anodization and cross-linking polymer resist, was applied to fabricate trench structures using only Ta and Cr/Ta bilayers. In particular, the top Cr layer was used not only as a hard mask to etch the underlying Ta in dry-etching, but also as an absorber material together with Ta. The Cr oxide or Ta with respect to Cr was eliminated due to the clear etch-selectivity of ICP dry-etching using C4F8 gas. This is a simple fabrication technique using AFM lithography fabricated metal trenches for the production of isolated metal structures as well as for producing EUVL absorber patterns.
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81.16.Nd Micro- and nanolithography
52.77.Bn Etching and cleaning
81.65.Cf Surface cleaning, etching, patterning

Path to achieve sub-10-nm half-pitch using electron beam lithography

A. Tavakkoli K. G., S. N. Piramanayagam, M. Ranjbar, R. Sbiaa, and T. C. Chong

J. Vac. Sci. Technol. B 29, 011035 (2011); http://dx.doi.org/10.1116/1.3532938 (7 pages) | Cited 5 times

Online Publication Date: 28 January 2011

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Achieving dense patterns with good resolution is a key step for several applications in micro- and nanoelectronics. Based on the mechanical strength and capillary forces between nanometer scale features, the authors have proposed that the use of thin resist is a solution to achieve dense array of patterns. Therefore, the authors have studied the effect of resist thickness on the resolution of dense patterns for both lines and dots. Based on the experimental results using hydrogen silsesquioxane resist, dense patterns with sub-10-nm half-pitch were achieved. The authors also propose a new method for calculating contrast for nanostructures.
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85.40.Hp Lithography, masks and pattern transfer
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back to top Theory of Dielectric Materials

Multiphonon hole trapping from first principles

F. Schanovsky, W. Gös, and T. Grasser

J. Vac. Sci. Technol. B 29, 01A201 (2011); http://dx.doi.org/10.1116/1.3533269 (5 pages) | Cited 1 time

Online Publication Date: 6 January 2011

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Nonradiative multiphonon capture of carriers into the gate dielectrics of metal-oxide-semiconductor systems and its involvement with the negative bias temperature instability is discussed. A simple method for the extraction of the line-shape function from an atomistic bulk defect model is suggested and applied to defect models in alpha quartz. Electronic structures are described using density functional theory.
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72.20.Jv Charge carriers: generation, recombination, lifetime, and trapping
63.20.kg Phonon-phonon interactions
71.55.Ht Other nonmetals
71.20.Nr Semiconductor compounds
back to top Advanced Technologies for Thin Dielectric Film Growth

Atomic layer deposition of HfO2 and Al2O3 layers on 300 mm Si wafers for gate stack technology

R. Lupták, J. M. J. Lopes, St. Lenk, B. Holländer, E. Durğun Özben, A. T. Tiedemann, M. Schnee, J. Schubert, S. Habicht, S. Feste, S. Mantl, U. Breuer, A. Besmehn, P. K. Baumann, and M. Heuken

J. Vac. Sci. Technol. B 29, 01A301 (2011); http://dx.doi.org/10.1116/1.3521374 (4 pages) | Cited 2 times

Online Publication Date: 6 January 2011

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In this study, the authors present results on the structural, chemical, and electrical characterization of HfO2 thin layers on 300 mm Si wafers. The layers were prepared by atomic layer deposition using a liquid delivery system technology for metal organic precursors, which allows an accurate control of the Hf precursor. After optimization of the deposition process with an alkylamide precursor for Hf and ozone chemistry, the growth of the SiOx interfacial layer between the HfO2 layer and the Si substrate could be minimized using TiN as metal gate. In addition, the authors studied the effect of Al2O3 interfacial layers on the properties of metal-oxide-semiconductor capacitor resulting in a positive flat band voltage shift of up to ∼ 300 mV according to the layer thickness. Gate stacks with equivalent oxide thicknesses around 1.1 nm showed leakage current densities as low as 1.1×10−2 A/cm2 at VFB of 1 V. In addition, the capacitance-voltage curves for thin HfO2 layers indicated a negligible hysteresis, below 10 mV, after a forming gas anneal when TiN was used as metal gate.
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84.32.Tt Capacitors
85.30.Tv Field effect devices
81.15.Dj E-beam and hot filament evaporation deposition

Structural and electrical properties of TixAl1−xOy thin films grown by atomic layer deposition

A. P. Alekhin, A. A. Chouprik, S. A. Gudkova, A. M. Markeev, Yu. Yu. Lebedinskii, Yu. A. Matveyev, and A. V. Zenkevich

J. Vac. Sci. Technol. B 29, 01A302 (2011); http://dx.doi.org/10.1116/1.3533763 (6 pages) | Cited 3 times

Online Publication Date: 10 January 2011

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Ternary oxide TixAl1−xOy thin films with a wide Ti/Al ratio have been grown by atomic layer deposition technique. As grown titanium aluminate films are shown to be a homogeneous alloy and exhibit the amorphous structure in the whole compositional range, while rapid thermal processing (RTP) induces the crystallization of binary and ternary phases once the composition of TixAl1−xOy film is close to the specific phase stoichiometry. The permittivity κ varies in the range κ = 12–30 depending on Ti/Al ratio in the film. A 0.5-nm-thick SiO2 layer formed at the film/Si interface during the deposition grows up to 2 nm upon RTP and presumably affects the leakage current, decreasing three orders of magnitude upon annealing.
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77.55.-g Dielectric thin films
77.84.Cg PZT ceramics and other titanates
81.40.Gh Other heat and thermomechanical treatments
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
61.43.Er Other amorphous solids
77.22.Ch Permittivity (dielectric function)

Chemical vapor deposition and characterization of high-k BaHf1−xTixO3 dielectric layers for microelectronic applications

A. Abrutis, T. Katkus, S. Stanionyte, V. Kubilius, G. Lupina, Ch. Wenger, and M. Lukosius

J. Vac. Sci. Technol. B 29, 01A303 (2011); http://dx.doi.org/10.1116/1.3521386 (4 pages)

Online Publication Date: 10 January 2011

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Possibilities to grow high-k BaHf1−xTixO3 layers were investigated by pulsed liquid injection metal-organic chemical vapor deposition technique. Ba(thd)2 (thd = 2,2,6,6-tetramethylheptane-3,5-dionate), Hf(thd)4, and Ti(OiPr)2(thd)2 were used as precursors, toluene as solvent, and Si(100) as substrate. The influence of solution composition and deposition temperature on crystallization and elemental and phase compositions of Ba–Hf–Ti–O layers was investigated. BaHf1−xTixO3 layers with x ∼ 0–0.5 may be obtained at 600–650 °C, whereas the lower deposition temperature (500–550 °C) resulted in crystallization of the dominating orthorhombic BaCO3 phase in deposited films. Films were characterized by x-ray diffraction, atomic force microscopy, and scanning electron microscopy. Electrical measurements were performed for deposited thin films in view of storage capacitor applications of BaHf1−xTixO3 films in dynamic random access memories.
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81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
68.55.Nq Composition and phase identification
68.55.aj Insulators
77.55.D- High-permittivity gate dielectric films
73.61.Ng Insulators

Impact of thermal treatment upon morphology and crystallinity of strontium titanate films deposited by atomic layer deposition

Mihaela Popovici, Sven Van Elshocht, Nicolas Menou, Paola Favia, Hugo Bender, Erik Rosseel, Johan Swerts, Christoph Adelmann, Christa Vrancken, Alain Moussa, Hilde Tielens, Kazuyuki Tomida, Malgorzata Pawlak, Ben Kaczer, Geert Schoofs, et al.

J. Vac. Sci. Technol. B 29, 01A304 (2011); http://dx.doi.org/10.1116/1.3534018 (6 pages)

Online Publication Date: 11 January 2011

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Strontium titanate (STO) is a dielectric with a cubic perovskite type structure and of increasing interest for microelectronics, especially in the metal-insulator-metal (MIM) capacitors due to its high dielectric constant. The dielectric constant of the STO films and consequently the performance of the MIM capacitors appear to be strongly influenced by the process conditions. In this work the authors report on the influence of various thermal treatments upon the crystallinity and morphology of strontium titanate crystals. The influence of spike, laser, or rapid thermal anneals on the morphology with respect to grain size and topography of the crystalline stoichiometric STO films is studied. Also, the use of a stack containing a Sr-rich STO (62% Sr) bottom seed layer and a stoichiometric STO top layer in combination with a thermal treatment was found to affect the microstructure of the STO film. A comparison of the electrical properties for various thermal treatments has been made.
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68.55.-a Thin film structure and morphology
73.61.Ng Insulators
81.40.Gh Other heat and thermomechanical treatments
77.55.D- High-permittivity gate dielectric films
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
61.66.Bi Elemental solids
61.66.Dk Alloys
back to top Characterisation of Dielectrics at Nano-Scale

Characterization of thickness variations of thin dielectric layers at the nanoscale using scanning capacitance microscopy

V. Yanev, M. Rommel, A. J. Bauer, and L. Frey

J. Vac. Sci. Technol. B 29, 01A401 (2011); http://dx.doi.org/10.1116/1.3532822 (6 pages)

Online Publication Date: 6 January 2011

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In this work, the applicability of scanning capacitance microscopy (SCM) for film thickness characterization and its sensitivity to the surface roughness on nanoscale were examined experimentally. SiO2 layers with different film thicknesses (between 5 and 19 nm) were analyzed by conventional capacitance-voltage (C-V) measurements and using SCM in the scanning capacitance spectroscopy (SCS) mode. The influence of the film thickness on the SCM signal was studied in detail by comparison of modeled data with experimental data. The dC/dV-V characteristics measured by SCS at the nanoscale could be correlated with derivatives of conventionally measured C-V curves as well as simulated C-V characteristics for the different film thicknesses. Quantitatively comparing their peak areas, it was found that the dC/dV signal of SCS correlates with the change in the insulator thickness. The sensitivity of SCM for the detection of local variations of dielectric-layer thicknesses at the nanoscale was demonstrated by SCM mapping of crystalline high-k layers, where spatial differences of the SCM signal could be directly correlated with changes in the topography caused by film thickness variations.
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77.55.F- High-permittivity capacitive films
68.35.bt Other materials
68.55.-a Thin film structure and morphology
back to top Emerging Dielectric Materials

Temperature hysteresis of the capacitance dependence C(T) for ferroelectric ceramics

Antonina Dedyk, Yulia Pavlova, Sergey Karmanenko, Alexander Semenov, Dmitry Semikin, Oleg Pakhomov, Alexander Starkov, and Ivan Starkov

J. Vac. Sci. Technol. B 29, 01A501 (2011); http://dx.doi.org/10.1116/1.3532944 (5 pages)

Online Publication Date: 6 January 2011

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The influence of applied electric field, temperature variation rate, and free charge carrier density on the hysteresis of C(T) dependence is investigated on ferroelectric ceramic capacitors. The measurements were performed on the ceramic capacitors of Ba0.55Sr0.45TiO3 containing 12 wt % of Mg complex additive and the 0.87Pb(Mg1/3Nb2/3)O3–0.13PbTiO3 ceramics. The investigations were directed to study of electrocaloric response of ferroelectric ceramics. Various mechanisms of temperature hysteresis are discussed.
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77.80.Dj Domain structure; hysteresis
77.70.+a Pyroelectric and electrocaloric effects
77.84.Ek Niobates and tantalates
77.84.Cg PZT ceramics and other titanates
72.80.Sk Insulators
back to top New Device Approaches

Properties of SiO2 and Si3N4 as gate dielectrics for printed ZnO transistors

S. Walther, S. Polster, B. Meyer, M. P. M. Jank, H. Ryssel, and L. Frey

J. Vac. Sci. Technol. B 29, 01A601 (2011); http://dx.doi.org/10.1116/1.3524291 (6 pages)

Online Publication Date: 6 January 2011

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In this article, the authors report on thin film transistors based on gas phase synthesized ZnO nanoparticles using low temperature deposited silicon dioxide and silicon nitride as gate dielectrics. For bottom gate transistors, the devices using silicon nitride as gate insulator show the lowest off-current for a given induced charge and the steepest subthreshold slope. The charge carrier mobility of around 3×10−3 cm2/V s and an Ion/Ioff ratio of around 105 are almost independent of the insulator material. In a double gated thin film transistor using low stress silicon nitride as a top gate insulator, transistor parameters are extracted for the identical semiconducting layer when the bottom and top gates are used. It is shown that the extracted charge carrier mobility is not inherent for the ZnO nanoparticle layer but rather an effective value for the device under investigation.
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85.30.Tv Field effect devices
back to top High-k Dielectrics on Si

Metallic oxygen barrier diffusion applied to high-κ deposition

E. Rauwel, P. Rauwel, F. Ducroquet, I. Matko, and A. C. Lourenço

J. Vac. Sci. Technol. B 29, 01A701 (2011); http://dx.doi.org/10.1116/1.3534019 (7 pages)

Online Publication Date: 11 January 2011

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A thin metallic interlayer was deposited on Si and Si/SiO2 substrate prior to the sputtering of HfO2 films. The metallic interlayer, in fact, acts as an oxygen barrier during the HfO2 deposition, preventing the formation of a low-κ layer at the high-κ/Si interface. After annealing, the metal diffuses in the HfO2 film. When the thickness of the metallic interlayer is properly adjusted, with respect to the thickness of the HfO2 film, the interfacial layer at HfO2/Si interface can almost be suppressed, thus improving the electrical properties of the gate stack.
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66.30.J- Diffusion of impurities
81.40.Gh Other heat and thermomechanical treatments
68.55.jd Thickness
77.55.D- High-permittivity gate dielectric films
73.40.Qv Metal-insulator-semiconductor structures (including semiconductor-to-insulator)
back to top High-k Dielectrics on High Mobility Semiconductors: Ge, III-V, III-N

Epitaxial growth of Dy2O3 films on SrTiO3(001) substrates by molecular beam epitaxy

Md. Nurul Kabir Bhuiyan, Mariela Menghini, Jean-Pierre Locquet, Jin Won Seo, Christel Dieker, Wolfgang Jäger, and Chiara Marchiori

J. Vac. Sci. Technol. B 29, 01A801 (2011); http://dx.doi.org/10.1116/1.3521482 (4 pages)

Online Publication Date: 6 January 2011

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Epitaxial Dy2O3 thin films are grown on SrTiO3(001) substrates by molecular beam epitaxy. Structural, morphological, and interfacial properties of the Dy2O3 film are investigated by in situ reflection high-energy electron diffraction (RHEED), ex situ x-ray diffraction (XRD), atomic force microscopy, and cross-sectional transmission electron microscopy (TEM). RHEED patterns and XRD spectra show that the Dy2O3 film is grown epitaxially in a cubic phase with a (001) orientation. The surface of the film is smooth with a rms roughness of 4 Å. The TEM image shows that the Dy2O3 film is crystalline with an abrupt interface between the film and substrate without any indication of a chemical reaction or interdiffusion occurring at the interface.
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68.55.A- Nucleation and growth
81.15.Hi Molecular, atomic, ion, and chemical beam epitaxy
77.55.Px Epitaxial and superlattice films
68.35.bt Other materials
68.37.Og High-resolution transmission electron microscopy (HRTEM)
68.35.Ct Interface structure and roughness

Interfacial properties of HfO2 dielectric film on Ge substrate

Dawei He, Xinhong Cheng, Dawei Xu, Zhongjian Wang, Yuehui Yu, Qingqing Sun, and David Wei Zhang

J. Vac. Sci. Technol. B 29, 01A802 (2011); http://dx.doi.org/10.1116/1.3521500 (3 pages)

Online Publication Date: 6 January 2011

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HfO2 dielectric films were grown on Ge substrate and annealed. High resolution transmission electron microscopy indicated that postdeposition annealing promoted further crystallization of HfO2 films and aggravated interfacial roughness. X-ray reflectivity measurements suggested that the total thickness of the dielectric stacks was 6.5 nm. X-ray photoelectron spectra indicated further oxidization of Ge substrate. The interface layer between HfO2 and Ge was mainly composed of GeO2. The valence band offset between HfO2 and Ge interface was calculated to be 2.0 eV. The electrical measurements indicated that the leakage current density was 10 mA/cm2 at a gate bias of 2 V. The equivalent oxide thickness was 1.9 nm and the dielectric constant was 13 for the annealed film.
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68.37.Og High-resolution transmission electron microscopy (HRTEM)
81.40.Gh Other heat and thermomechanical treatments
77.22.Ch Permittivity (dielectric function)
79.60.Jv Interfaces; heterostructures; nanostructures
82.80.Pv Electron spectroscopy (X-ray photoelectron (XPS), Auger electron spectroscopy (AES), etc.)
77.55.D- High-permittivity gate dielectric films

Characterization of NbAlO dielectric film deposited on InP

Dawei He, Xinhong Cheng, Dawei Xu, Zhongjian Wang, Yuehui Yu, Qingqing Sun, and David Wei Zhang

J. Vac. Sci. Technol. B 29, 01A803 (2011); http://dx.doi.org/10.1116/1.3532387 (3 pages)

Online Publication Date: 10 January 2011

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In this work, NbAlO dielectric films were grown by atomic layer deposition method on InP substrate and were treated with rapid thermal annealing (RTA) process at 500 °C. Synchrotron radiation x-ray reflectivity measurements suggested that 1.5 nm interfacial layer exists at InP interface with a roughness of 0.4 nm. Synchrotron radiation x-ray diffraction showed that NbAlO film was polycrystal after RTA treatment. X-ray photoelectron spectra indicated that Nb–Al, Nb–O, and Al–O bonds existed. The electrical measurements indicated that the equivalent oxide thickness and the dielectric constant were 3.2 and 32 nm, respectively, and the leakage current density increased quickly from 0.6 to 15 mA/cm2 when gate bias changed from 1 to 4V.
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77.55.-g Dielectric thin films
77.22.Ch Permittivity (dielectric function)
68.35.Ct Interface structure and roughness
68.55.aj Insulators
61.72.Cc Kinetics of defect formation and annealing
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)

Impact of halo implant on the hot carrier reliability of germanium p-channel metal-oxide-semiconductor field-effect transitors

J. Franco, G. Eneman, B. Kaczer, J. Mitard, B. De Jaeger, and G. Groeseneken

J. Vac. Sci. Technol. B 29, 01A804 (2011); http://dx.doi.org/10.1116/1.3520647 (4 pages)

Online Publication Date: 10 January 2011

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Hot carrier (HC) reliability of Si-passivated, Ge channel, p-channel metal-oxide-semiconductor field-effect transitors (pMOSFETs) with a physical gate length of 70 nm is investigated in this article. HCs are reported to affect the reliability of these devices more than negative bias temperature instability, which is normally considered as the most serious reliability concern for Si p-channel field effect transistors. The impact of different halo implant conditions on the HC reliability of Ge pMOSFETs is then studied. High energy and high dose halo implants, while being very effective for threshold voltage adjustment of short-channel devices, can remarkably reduce device lifetime under HC stress condition due to the enhanced electric field peak near the drain side of the channel. HC reliability, therefore, should be carefully taken into account when optimizing halo implant conditions for Ge p-channel metal-oxide-semiconductor.
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85.30.Tv Field effect devices
73.50.Fq High-field and nonlinear effects

High quality epitaxial Dy3Ge5 films grown on Ge(001) substrates

Md. Nurul Kabir Bhuiyan, Mariela Menghini, Jean-Pierre Locquet, Jin Won Seo, and Chiara Marchiori

J. Vac. Sci. Technol. B 29, 01A805 (2011); http://dx.doi.org/10.1116/1.3536510 (4 pages)

Online Publication Date: 14 January 2011

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Dy thin films are grown on Ge(001) substrates by molecular beam deposition at room temperature. Subsequently, the Dy films are annealed at a high temperature of 550 °C for the growth of Dy3Ge5 films. Structural, morphological, and electrical properties of the Dy3Ge5 films are investigated by in situ reflection high-energy electron diffraction and ex situ x-ray diffraction, atomic force microscopy, and resistivity measurements. Reflection high-energy electron diffraction patterns and x-ray diffraction spectra show that the Dy3Ge3 film crystalline structure is formed and identified as an orthorhombic phase with smooth surface and with pits when annealing at a temperature of 500 °C. A smooth surface of the epitaxial Dy3Ge3 film can be achieved with a reduced pit formation using a step-growth process.
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81.15.Np Solid phase epitaxy; growth from solid phases
68.35.bd Metals and alloys
68.55.A- Nucleation and growth
78.66.Bz Metals and metallic alloys
61.05.jh Low-energy electron diffraction (LEED) and reflection high-energy electron diffraction (RHEED)
81.65.Kn Corrosion protection

Atomic layer deposition temperature dependent minority carrier generation in ZrO2/GeO2/Ge capacitors

O. Bethge, S. Abermann, C. Henkel, J. Smoliner, E. Bertagnolli, C. J. Straif, and H. Hutter

J. Vac. Sci. Technol. B 29, 01A806 (2011); http://dx.doi.org/10.1116/1.3521472 (7 pages) | Cited 1 time

Online Publication Date: 18 January 2011

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Low leakage ZrO2 dielectrics with a thickness of 7 nm are grown by means of atomic layer deposition (ALD) on GeO2-passivated Ge substrates. Substrate temperatures during the deposition of ZrO2 are set to 150 and 250 °C, respectively. The influence of the deposition temperature on electrical and structural properties of metal-oxide-semiconductor capacitors is investigated. A significant impact of the ALD temperature on the high frequency capacitance in inversion is demonstrated. The deposition at 250 °C leads to a substantial loss of interfacial GeOx indicated by time-of-flight secondary ion mass spectroscopy. The loss, which gives rise to trap levels near the oxide/Ge interface, shifts the thermal activation energy of minority carrier generation from a full Ge-bandgap energy to midgap energies.
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84.32.Tt Capacitors

Electrical analysis of three-stage passivated In0.53Ga0.47As capacitors with varying HfO2 thicknesses and incorporating an Al2O3 interface control layer

S. Monaghan, A. O’Mahony, K. Cherkaoui, É. O’Connor, I. M. Povey, M. G. Nolan, D. O’Connell, M. E. Pemble, P. K. Hurley, G. Provenzano, F. Crupi, and S. B. Newcomb

J. Vac. Sci. Technol. B 29, 01A807 (2011); http://dx.doi.org/10.1116/1.3532826 (8 pages) | Cited 5 times

Online Publication Date: 19 January 2011

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The atomic layer deposition of high dielectric constant oxides like HfO2 on III-V substrates such as In0.53Ga0.47As leads to a poor interface, with the growth of In0.53Ga0.47As native oxides regardless of the surface pretreatment and passivation method. The presence of the native oxides leads to poor gate leakage current characteristics due to the low band gap of the native oxides and the presence of potential wells at the interface. In addition, the poor quality of this interface leads to very large interface state defect densities, which are detrimental to metal-oxide-semiconductor-based device performance. A wide band gap interlayer replacing the native oxide layer would remove the potential wells and provide a larger barrier to conduction. It may also assist in the improvement of the interface quality, but the problem remains as to how this native oxide interlayer cannot only be removed but prevented from regrowing. In this regard, the authors present electrical results showing that the atomic layer deposition (ALD) growth of a thin ( ∼ 1 nm) Al2O3 layer before the ALD growth of HfO2 causes a removal/reduction of the native oxides on the surface by a self-cleaning process without subsequent regrowth of the native oxides. As a result, there are significant improvements in gate leakage current densities, and significant improvements in the frequency dispersion of capacitance versus gate voltage, even when a defective In0.53Ga0.47As epitaxial layer on an InP substrate is employed. Measurements at different temperatures confirm that the frequency dispersion is mainly due to interface state defect responses and another weakly temperature dependent mechanism such as border traps, after accounting for the effects of nonideal In0.53Ga0.47As epitaxial layer growth defects where applicable.
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84.32.Tt Capacitors

Electrical properties of InAlN/GaN high electron mobility transistor with Al2O3, ZrO2, and GdScO3 gate dielectrics

K. Čičo, K. Hušeková, M. Ťapajna, D. Gregušová, R. Stoklas, J. Kuzmík, J.-F. Carlin, N. Grandjean, D. Pogany, and K. Fröhlich

J. Vac. Sci. Technol. B 29, 01A808 (2011); http://dx.doi.org/10.1116/1.3521506 (5 pages) | Cited 1 time

Online Publication Date: 19 January 2011

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The authors report on preparation and electrical characterization of InAlN/AlN/GaN metal-oxide-semiconductor (MOS) high electron mobility transistors (HEMTs) with Al2O3, ZrO2, and GdScO3 gate dielectrics. About 10 nm thick high-κ dielectrics were deposited by metal organic chemical vapor deposition after the Ohmic contact processing. Application of the gate dielectrics for 2 μm gate length MOS HEMTs leads to gate leakage current reduction from four to six orders of magnitude compared with Schottky barrier HEMTs. Among others, MOS HEMTs with an Al2O3 gate dielectric shows the highest transconductance ( ∼ 150 mS/mm) and maximum drain current ( ∼ 0.77 A/mm) and the lowest sheet resistance of ∼ 260 Ω/◻. MOS HEMTs with GdScO3 shows the highest breakdown electric field of about 7.0 MV/cm. A deep level transient spectroscopy (DLTS) based analysis revealed the maximum interface state density Dit up to 4×1012, 9×1012, and 3×1013 eV−1 cm−2 for Al2O3, ZrO2, and GdScO3/InAlN interface, respectively.
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85.30.Tv Field effect devices
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)

Performance of AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistors with AlN gate insulator prepared by reactive magnetron sputtering

R. Stoklas, D. Gregušová, Š. Gaži, J. Novák, and P. Kordoš

J. Vac. Sci. Technol. B 29, 01A809 (2011); http://dx.doi.org/10.1116/1.3523362 (4 pages) | Cited 1 time

Online Publication Date: 21 January 2011

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The reactive magnetron sputtering technique at room temperature was used to prepare AlN dielectric layer for application in AlGaN/GaN metal-insulator-semiconductor heterostructure field-effect transistors (MIS-HFETs). Two different gas ambiences (mixture of nitrogen and argon N2/Ar = 0.35 and N2 alone, respectively) were applied. An increase in the saturation drain current ( ∼ 50%) and transconductance ( ∼ 45%) of the MIS-HFETs compared with HFET counterparts (IDS = 363 mA/mm and gm = 114 mS/mm) was observed. AlN/AlGaN/GaN MIS-HFET, where only the nitrogen gas ambience was used to deposit an AlN dielectric layer, reduced the gate leakage current up to four orders of magnitude ( ∼ 10−8 A/mm at −5 V) in comparison with the HFET. The improvements of the dynamic characteristics of the MIS-HFETs (reduction of the current collapse and density of the slow traps) were achieved. The N2 MIS-HFET exhibits better improvements of the static and dynamic parameters than the ArN2 MIS-HFET, and therefore the deposition of the AlN layer in the N2 alone is more effective.
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85.30.Tv Field effect devices
back to top High-k/Metal Gate Stack, Characterisation, Scaling, Stability

Electrical characterization of high-k based metal-insulator-semiconductor structures with negative resistance effect when using Al2O3 and nanolaminated films deposited on p-Si

A. Gómez, H. Castán, H. García, S. Dueñas, L. Bailón, F. Campabadal, J. M. Rafí, and M. Zabala

J. Vac. Sci. Technol. B 29, 01A901 (2011); http://dx.doi.org/10.1116/1.3521383 (5 pages) | Cited 2 times

Online Publication Date: 6 January 2011

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In this work, the results of the electrical behavior of metal-insulator-semiconductor (MIS) structures using Al2O3, HfO2, and nanolaminated layers as gate insulators are reported. The MIS structures were deposited by atomic layer deposition on several Si substrates. The authors observed different conduction mechanisms for these high-k based MIS structures depending on the bias regime. Direct tunneling, Fowler–Nordheim, Poole–Frenkel emission, and a negative resistance region have been observed at different gate voltage values. The tunneling conduction of majority and minority carriers assisted by defects located at the Al2O3/HfO2 and Al2O3/metal interfaces can explain the negative resistance behavior observed in Al2O3 and nanolaminated samples. In addition to current-voltage (I-V) measurements, MIS structures were also electrically characterized using capacitance-voltage (C-V), deep level transient spectroscopy, conductance transients (G-t), and flat-band voltage transient (VFB-t) techniques.
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73.40.Qv Metal-insulator-semiconductor structures (including semiconductor-to-insulator)
77.55.D- High-permittivity gate dielectric films
81.05.Cy Elemental semiconductors
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
68.55.A- Nucleation and growth
72.20.Ht High-field and nonlinear effects

Trapping in GdSiO high-k films

R. Rao, R. Simoncini, H. D. B. Gottlob, M. Schmidt, and F. Irrera

J. Vac. Sci. Technol. B 29, 01A902 (2011); http://dx.doi.org/10.1116/1.3521385 (4 pages)

Online Publication Date: 10 January 2011

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In this article, the authors systematically characterized TiN/GdSiO/SiO2/Si metal oxide semiconductor capacitors from the point of view of charge trapping. Charge trapping was investigated measuring the flatband voltage with the pulsed capacitance-voltage (C-V) technique, in condition of injection from gate and substrate. As a result, a bell shaped curve of the flatband shift versus trapping time was found, with a turn-around at 100–200 μs. This was explained as the concomitant of transient phenomena due to a charge of opposite polarity starting from the two different interfaces of the high-k film. This study was possible only because of the pulsed C-V technique. At long times, trapping has always shown a logarithmic trend and the kinetics of trapping is linearly dependent on the applied voltage. Finally, dc and pulsed stress were performed at voltages of interest for logic applications.
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84.32.Tt Capacitors

Rare-earth oxide/TiN gate stacks on high mobility strained silicon on insulator for fully depleted metal-oxide-semiconductor field-effect transistors

E. Durğun Özben, J. M. J. Lopes, A. Nichau, R. Lupták, S. Lenk, A. Besmehn, K. K. Bourdelle, Q. T. Zhao, J. Schubert, and S. Mantl

J. Vac. Sci. Technol. B 29, 01A903 (2011); http://dx.doi.org/10.1116/1.3533760 (5 pages)

Online Publication Date: 10 January 2011

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We demonstrate the integration of TbScO3, LaScO3, and LaLuO3 as alternative gate oxides for fully depleted silicon on insulator (SOI) and strained SOI metal-oxide-semiconductor field-effect transistors (MOSFETs) with equivalent oxide thicknesses of 2.8, 2.4, and 1.55 nm, respectively. Silicate formation at the high-κ/Si interface was studied by x-ray photoelectron spectroscopy. Electrical investigations revealed good transistor performance with these novel gate oxides with permittivities in the range of 26–32 and TiN as a metal gate. Steep inverse subthreshold slopes of 72 mV/dec, high Ion/Ioff ratios over 108, and a low density of interface states of ≈ 5×1011 (eV cm2)−1 were achieved. MOSFETs on SOI substrates show good low field electron mobilities of 180, 183, and 188 cm2/V s for all investigated oxides. For devices on strained SOI the electron mobility was improved by a factor of 2. The measured mobilities are close to those of devices with HfO2 as gate dielectric, while offering better electrostatic control due to their higher permittivities.
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85.30.Tv Field effect devices

Effect of gate capping configurations and silicon-on-insulator thickness with external stresses on partially depleted metal-oxide-semiconductor field-effect transistors

Wen-Teng Chang, Jian-An Lin, Chih-Chung Wang, and Wen-Kuan Yeh

J. Vac. Sci. Technol. B 29, 01A904 (2011); http://dx.doi.org/10.1116/1.3534008 (4 pages)

Online Publication Date: 10 January 2011

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Silicon nitride gate capping by contact etch-stop layer (CESL) was used in this study to induce high and low tensile and compressive stresses on 50-, 70-, and 90-nm-thick silicon-on-insulator (SOI) n-/p-metal-oxide-semiconductor field-effect transistors. The devices with thicker SOI show a higher interface state, particularly the highly strained devices, although they exhibit higher transconductance. The transconductances of different CESL configurations are sensitive to the tSOI effect, but the transconductances of different tSOI are less sensitive to external compressive stress compared with those of CESL configurations. The CESL-induced compressive devices show higher piezoresistive coefficients than the tensile CESL devices, yielding an external stress of up to about 45.7 MPa for both longitudinal and transverse configurations. This probably results from nonlinear stress-strain relations on the CESL-induced strained channel.
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85.30.Tv Field effect devices

Fluorine implantation for effective work function control in p-type metal-oxide-semiconductor high-k metal gate stacks

A. Fet, V. Häublein, A. J. Bauer, H. Ryssel, and L. Frey

J. Vac. Sci. Technol. B 29, 01A905 (2011); http://dx.doi.org/10.1116/1.3521471 (5 pages) | Cited 1 time

Online Publication Date: 11 January 2011

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The instability of the p-type metal effective work function of high-k/metal gate metal-oxide-semiconductor stacks after high temperature treatment results in device threshold voltage shifts and is one of the big challenges for the gate-first integration of high-k dielectrics in the future complementary metal-oxide semiconductor process flow. The exact cause of this instability is a subject of intense debate. In this article, it is shown that by implanting the gate stack with a fluorine dose of 1015 cm−2, it is possible to achieve an appropriate silicon valence band-edge effective work function of 5.1 eV for p-type metal-oxide-semiconductor devices. It is also shown that the fluorine doping can be accomplished not only with F+, but also with BF2+ ions. The influence of the implantation energy on the obtained effective work function is demonstrated and discussed. The origin of the induced shift is also discussed. Leakage current measurements show that the leakage properties of high-k stacks are not worsened by F implantation, while the implantation of BF2 slightly affects the leakage currents.
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84.32.Tt Capacitors
back to top Defect Characterisation, Engineering of Dielectrics, Leakage Currents

O-vacancies in (i) nanocrystalline HfO2 and (i) noncrystalline SiO2 and Si3N4 studied by x-ray absorption spectroscopy

Gerald Lucovsky, Leonardo Miotti, and Karen Paz Bastos

J. Vac. Sci. Technol. B 29, 01AA01 (2011); http://dx.doi.org/10.1116/1.3533758 (9 pages) | Cited 3 times

Online Publication Date: 25 January 2011

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Performance and reliability of semiconductor-oxide-metal devices with high-κ gate dielectrics are limited by electronically active O-atom vacancy defects. Synchrotron x-ray spectroscopy defect features have been interpreted using two-electron multiplet theory. This approach quantifies conduction band edge and pre-edge features assigned to intrinsic bonding effects. Theoretical studies based on density functional theory have identified these defects as neutral and negatively-charged O-atom vacancies in transition metal (TM) oxides including HfO2 and ZrO2. However, agreement between calculated electronic states and experiment has been less than satisfactory. In this paper the O-vacancy electronic structure is addressed using a theoretical approach extended from multiplet theory traditionally applied to occupied intrinsic, and alloy and impurity atom d states in TM oxides. An equivalent d2 model based occupation of two d orbitals of the TM atoms that border the neutral vacancy site has been used to determine relative energies of allowed transitions and negative ion states. This has provided excellent agreement with x-ray absorption spectroscopy results in the O K pre-edge regime. This model is based on minimization of repulsion between the two electrons in a high-spin d configurations occupying the vacancy site.
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61.72.jd Vacancies
78.70.Dm X-ray absorption spectra
61.46.Df Structure of nanocrystals and nanoparticles ("colloidal" quantum dots but not gate-isolated embedded quantum dots)
73.22.-f Electronic structure of nanoscale materials and related systems
61.43.-j Disordered solids

Spectroscopic detection of hopping induced mixed valence for Ti and Sc in GdSc1−xTixO3 for x greater than the percolation threshold of ∼ 0.16

Gerry Lucovsky, Leonardo Miotti, Karen Paz Bastos, Carolina Adamo, and Darrell G. Schlom

J. Vac. Sci. Technol. B 29, 01AA02 (2011); http://dx.doi.org/10.1116/1.3533759 (6 pages) | Cited 1 time

Online Publication Date: 25 January 2011

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Only two of the first row transition metals have elemental oxides that are either ferromagnetic or ferrimagnetic; these are CrO2 and Fe3O4. The electron spin alignment enabling ferromagnetism and/or ferrimagnetism in these oxides is associated with a double exchange mechanism that requires mixed valence and metallic conductivity. This article describes a novel way to realize these two necessary, but insufficient conditions for double exchange magnetism. These are mixed valence and a hopping conductivity that can force intraplane electron spin alignment in a complex oxide host perovskite, A(B,C)O3, where A is an ordinary metal or d0 lanthanide, B is a d0 transition metal, and C is a dn transition metal with n ≥ 1 as, for example, in GdS1−xTixO3. This article combines x-ray absorption spectroscopy, multiplet theory, charge transfer multiplet theory, and degeneracy removal by Jahn–Teller effect mechanisms to demonstrate mixed valence for both Sc and Ti above a percolation limit, x>0.16, in which hopping transport gives rise to a metal to insulator transition. In this alloy, ferromagnetism/ferrimagnetism is not observed due to alternating spin alignment in sequenced (Sc,Ti)O2 planes.
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72.20.Ee Mobility edges; hopping transport
75.50.Dd Nonmetallic ferromagnetic materials
75.30.Et Exchange and superexchange interactions
78.70.Dm X-ray absorption spectra
75.50.Gg Ferrimagnetics
71.30.+h Metal-insulator transitions and other electronic transitions

Traps and trapping phenomena and their implications on electrical behavior of high-k capacitor stacks

A. Paskaleva, M. Lemberger, E. Atanassova, and A. J. Bauer

J. Vac. Sci. Technol. B 29, 01AA03 (2011); http://dx.doi.org/10.1116/1.3521501 (10 pages)

Online Publication Date: 25 January 2011

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The traps and trapping phenomena and their implications on leakage currents, conduction mechanisms, and stress-induced leakage current in high-k dielectrics have been investigated. Various dielectrics (mostly multicomponent materials) have been studied to demonstrate the large diversity of phenomena that govern the electrical behavior of the structures depending on dielectric material, trap and stack parameters, and measurement conditions. The effects common for the most of high-k dielectrics and those typical for each individual structure have been discussed. The singly positively charged oxygen vacancy has been elucidated as the main electron transport site in the high-k materials. The role of the pre-existing traps for the electrical degradation of high-k stacks has been evidenced.
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84.32.Tt Capacitors

Temperature dependence of the emission and capture times of SiON individual traps after positive bias temperature stress

M. Toledano-Luque, B. Kaczer, Ph. Roussel, M. J. Cho, T. Grasser, and G. Groeseneken

J. Vac. Sci. Technol. B 29, 01AA04 (2011); http://dx.doi.org/10.1116/1.3532947 (5 pages) | Cited 1 time

Online Publication Date: 25 January 2011

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The authors study the statistical properties of individual defects in n-type metal-oxide-semiconductor field-effect transistors (nMOSFETs) using time dependent defect spectroscopy. This technique is based on the analysis of quantized threshold voltage transients observed on nanoscaled p-type metal-oxide-semiconductor field-effect transistors (pMOSFETs) after negative stress and provides the characteristic emission and capture times of individual traps. To complement to previous studies, the authors apply the methodology to SiON nMOSFETs and positive bias temperature stress. The authors demonstrate that the relaxation transients are due to the collective behavior of individual traps. Furthermore, a strong temperature dependence is observed for both emission and capture times. This is incompatible with elastic tunneling theory which is used in trap characterization techniques such as charge pumping, and also in simulations of erase and program transients of nonvolatile memories. The calculated thermal activation energies for both times are in the order of 0.6 eV and are close to the values obtained for SiON pMOSFETs when negatively stressed.
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85.30.Tv Field effect devices

Analysis of the effect of germanium preamorphization on interface defects and leakage current for high-k metal-oxide-semiconductor field-effect transistor

G. Roll, S. Jakschik, M. Goldbach, A. Wachowiak, T. Mikolajick, and L. Frey

J. Vac. Sci. Technol. B 29, 01AA05 (2011); http://dx.doi.org/10.1116/1.3521479 (5 pages)

Online Publication Date: 25 January 2011

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In this article, the authors analyze the impact of germanium amorphization on the interface defect concentration of state of the art high-k metal gate metal-oxide-semiconductor field-effect transistors. The gate etch is a crucial process step for the high-k gate first integration approach. Germanium implantation is used to amorphize the annealed and, therefore, nanocrystalline hafnium silicon oxide. This ensures a well controlled wet etch removal. The quality of the gate oxide to the channel interface of the transistor samples is monitored by charge pumping. The influence of the damage caused by the germanium implant at the unprotected gate edge is analyzed for different gate stacks by measuring the gate induced drain leakage. The defect concentration at the gate edge can be reduced by adjusting the germanium amorphization energy.
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85.30.Tv Field effect devices
85.40.Ry Impurity doping, diffusion and ion implantation technology

Study of the physical and electrical degradation of thin oxide films by atomic force microscope

Wael Hourani, Brice Gautier, Liviu Militaru, David Albertini, and Armel Descamps-Mandine

J. Vac. Sci. Technol. B 29, 01AA06 (2011); http://dx.doi.org/10.1116/1.3521474 (8 pages) | Cited 2 times

Online Publication Date: 25 January 2011

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The hillocks created by the application of ramped voltage stress on thin oxide films have been imaged using different modes of the atomic force microscope (AFM) and using conductive or insulating tips, leading to the conclusion that these anomalous hillocks correspond to real (physical) modification of the oxide’s surface. Electric force microscopy has also been used, which shows that negative charges are trapped in the oxide layer after the ramps and contribute to the contrast of AFM images although their role may not be predominant. Comparisons between ramps operated in air and in dry atmosphere or vacuum emphasize the role of the water layer covering the sample in the apparition of the hillock. The authors’ results tend to accredit that the formation of the hillock is a complex phenomenon involving a chemical (oxidation), electrical (trapped charges), and physical (electrothermal effect) mechanisms.
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68.60.-p Physical properties of thin films, nonelectronic
77.22.Jp Dielectric breakdown and space-charge effects
73.61.Ng Insulators

Electrical characteristics of metal-insulator-semiconductor structures with atomic layer deposited Al2O3, HfO2, and nanolaminates on different silicon substrates

F. Campabadal, J. M. Rafí, M. Zabala, O. Beldarrain, A. Faigón, H. Castán, A. Gómez, H. García, and S. Dueñas

J. Vac. Sci. Technol. B 29, 01AA07 (2011); http://dx.doi.org/10.1116/1.3532544 (7 pages) | Cited 2 times

Online Publication Date: 25 January 2011

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In this work, the electrical characteristics of different atomic layer deposited high-permittivity dielectric films (Al2O3, HfO2, and a nanolaminate of them), with a physical thickness of about 10 nm, are evaluated. An extensive capacitance-voltage and current-voltage characterization at room temperature is carried out on metal-insulator-semiconductor structures fabricated on different p-type and n-type silicon substrates and with Al as metal gate. HfO2 layers are found to exhibit the higher dielectric constant, but they suffer from the largest hysteresis and leakage currents and the lowest breakdown voltages. The nanolaminate stacks, with an intermediate dielectric constant, are found to exhibit more similarities to the Al2O3 layers, withstanding the largest voltages of all the studied dielectric films. The electrical degradation of the layers is evaluated by means of consecutive current-voltage ramps and with constant voltage stress experiments. Results on n-type Si, with electron injection from the substrate, indicate a dominant negative charge trapping on all the studied layers, leading to a decrease in the leakage current levels. On the other hand, the results on p-type Si, with electron injection from the metal gate, suggest that not only charge trapping but also creation of new traps, particularly under the higher stress voltages, are responsible for the observed degradation.
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73.40.Qv Metal-insulator-semiconductor structures (including semiconductor-to-insulator)
77.22.Ch Permittivity (dielectric function)
77.22.Jp Dielectric breakdown and space-charge effects
77.55.df For silicon electronics
77.80.Dj Domain structure; hysteresis
back to top Electrical Characterisation and Reliability of Devices with Alternative Dielectrics

Recent trends in bias temperature instability

B. Kaczer, T. Grasser, J. Franco, M. Toledano-Luque, Ph. J. Roussel, M. Cho, E. Simoen, and G. Groeseneken

J. Vac. Sci. Technol. B 29, 01AB01 (2011); http://dx.doi.org/10.1116/1.3521505 (7 pages) | Cited 1 time

Online Publication Date: 6 January 2011

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Several trends occurring in the past few years in our understanding of bias temperature instability (BTI) are reviewed. Among the most important is the shift toward analyzing BTI relaxation with the tools originally developed for describing low-frequency noise. This includes the interpretation of the time, temperature, voltage, and duty cycle dependences. It is shown that a wealth of information about gate oxide defect properties can be obtained from deeply scaled devices and correctly modeled based on nonradiative multiphonon theory. It is then shown how detailed understanding of individual defect properties can allow interpreting the variability issues of future complementary metal-oxide semiconductor technologies. This is complemented by showing the most promising technological solutions for BTI.
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85.30.Tv Field effect devices

Dielectric breakdown in polycrystalline hafnium oxide gate dielectrics investigated by conductive atomic force microscopy

V. Iglesias, M. Porti, M. Nafría, X. Aymerich, P. Dudek, and G. Bersuker

J. Vac. Sci. Technol. B 29, 01AB02 (2011); http://dx.doi.org/10.1116/1.3532945 (4 pages) | Cited 3 times

Online Publication Date: 10 January 2011

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The relationship between the topographical and electrical properties of the polycrystalline HfO2 layer has been investigated using conductive atomic force microscopy under ultrahigh vacuum conditions. Its high lateral resolution identified the grain boundaries (GBs) as a primarily conduction path through the dielectric. Electrical stress-induced breakdown sites were also found to be located at the GBs, suggesting that the polycrystalline phase of the gate dielectric may impair reliability.
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77.22.Jp Dielectric breakdown and space-charge effects
61.72.Mm Grain and twin boundaries
77.55.D- High-permittivity gate dielectric films
81.15.-z Methods of deposition of films and coatings; film growth and epitaxy
68.55.aj Insulators
77.84.Bw Elements, oxides, nitrides, borides, carbides, chalcogenides, etc.

CV measurements on LaLuO3 stack metal-oxide-semiconductor capacitor using a new three-pulse technique

N. Sedghi, I. Z. Mitrovic, S. Hall, J. M. J. Lopes, and J. Schubert

J. Vac. Sci. Technol. B 29, 01AB03 (2011); http://dx.doi.org/10.1116/1.3533267 (6 pages)

Online Publication Date: 11 January 2011

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A new three-pulse CV measurement technique has been developed to investigate the trapping and detrapping of negative and positive charges in SiO2/LaLuO3 gate dielectric stacks on p-type silicon. Two types of negative and positive trapped charges have been observed in these devices which are deemed to be related to electron and hole trapping, respectively. The technique has the advantage that trapping and detrapping of both types of charges can be measured independently. The concentrations of trapped charge types, their release times, and their relationship with measurement parameters such as pulse charging/discharging time and pulse amplitude have been investigated. A logarithmic universal relationship was found between the flat-band voltage shifts due to detrapping of positive charges with the discharging time.
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84.32.Tt Capacitors

Dielectric layers suitable for high voltage integrated trench capacitors

J. vom Dorp, T. Erlbacher, A. J. Bauer, H. Ryssel, and L. Frey

J. Vac. Sci. Technol. B 29, 01AB04 (2011); http://dx.doi.org/10.1116/1.3525283 (6 pages)

Online Publication Date: 14 January 2011

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In this work, two different dielectric stacks consisting of silicon dioxide (SiO2) and silicon nitride (Si3N4) are analyzed regarding their suitability as dielectrics in a high voltage trench capacitor. The processing of the dielectric layers and the resulting edge-coverage in the trench holes are described. Voltage and temperature dependence of the trench capacitance are analyzed and compared with planar capacitors for reference. The leakage currents are measured and the current transport mechanisms are analyzed. The outstanding properties of the devices are a high capacitance per area (1.25 nF/mm2 for SiO2 and 1.5 nF/mm2 for Si3N4), a low temperature coefficient (SiO2: 18 ppm/K; Si3N4: 85 ppm/K from 25–100 °C), and a low leakage current (<1×10−6 A) for voltages up to 400 V for Si3N4.
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84.32.Tt Capacitors

Noncontact metrology for inversion charge carrier mobility by corona charge and photovoltage measurements on blank wafers with a gate dielectric

J. L. Everaert, E. Rosseel, A. Pap, A. Meszaros, J. Dekoster, and T. Pavelka

J. Vac. Sci. Technol. B 29, 01AB05 (2011); http://dx.doi.org/10.1116/1.3521384 (5 pages)

Online Publication Date: 18 January 2011

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An analysis method is presented for noncontact metrology for inversion charge carrier mobility. It is based on determining the sheet resistance of the inversion charge carriers by charge spreading metrology. To calculate the mobility, the amount of inversion charge carriers must be accurately known. A method is evaluated based on the increment of the sheet conductance in function of the corona charge.
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72.20.Fr Low-field transport and mobility; piezoresistance
72.40.+w Photoconduction and photovoltaic effects
72.80.Cw Elemental semiconductors

Current instabilities in rare-earth oxides-HfO2 gate stacks grown on germanium based metal-oxide-semiconductor devices due to Maxwell–Wagner instabilities and dielectrics relaxation

M. S. Rahman, E. K. Evangelou, A. Dimoulas, G. Mavrou, and S. Galata

J. Vac. Sci. Technol. B 29, 01AB06 (2011); http://dx.doi.org/10.1116/1.3532946 (7 pages) | Cited 1 time

Online Publication Date: 18 January 2011

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The authors report the current instabilities in rare-earth oxides-HfO2 gate stacks grown on Ge (001) based metal-oxide-semiconductor devices under constant voltage stress (CVS). The devices have been subjected to CVS and show relaxation effect and charge accumulation/trapping at the interface of the high-k bilayers known as Maxwell–Wagner (MW) polarization; both cause current instabilities (i.e., current decay). The experimental data can only be explained when co-occurrent effects of MW instability and dielectric relaxation are taken into consideration. On the contrary, any single effect alone is unable to fit and/or explain the results completely. It is interesting that these effects show field dependent behavior; that is, at low CVS, the authors observe the current instabilities (follow J ∼ t−n law), whereas at higher field, the charge trapping and/or the creation of new defects in the oxides, which eventually lead to breakdown, are significant. These results are also confirmed by capacitance-voltage (C−Vg) measurements in respective conditions.
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73.40.Qv Metal-insulator-semiconductor structures (including semiconductor-to-insulator)
85.30.-z Semiconductor devices
84.32.Tt Capacitors

Processing dependences of channel hot-carrier degradation on strained-Si p-channel metal-oxide semiconductor field-effect transistors

E. Amat, J. Martin-Martínez, M. B. Gonzalez, R. Rodríguez, M. Nafría, X. Aymerich, P. Verheyen, and E. Simoen

J. Vac. Sci. Technol. B 29, 01AB07 (2011); http://dx.doi.org/10.1116/1.3523396 (4 pages)

Online Publication Date: 19 January 2011

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The channel hot-carrier (CHC) degradation in metal-oxide semiconductor field-effect transistors based on a high-k dielectric with strained-Si/relaxed Si1−xGex structures has been little studied so far. However, due to the high mobility enhancement observed in these samples, a deeper study of the CHC impact on them is necessary. In this article, the effects of the Ge content, overgrowth, channel length, and operating temperature on the CHC degradation have been analyzed. The results show that devices with higher mobility suffer larger CHC aging both at room temperature and in the elevated temperature range.
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85.30.Tv Field effect devices

Gate oxide reliability at the nanoscale evaluated by combining conductive atomic force microscopy and constant voltage stress

T. Erlbacher, V. Yanev, M. Rommel, A. J. Bauer, and L. Frey

J. Vac. Sci. Technol. B 29, 01AB08 (2011); http://dx.doi.org/10.1116/1.3532820 (4 pages)

Online Publication Date: 19 January 2011

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The gate oxide integrity of different thin films (silicon dioxide, silicon nitride, and hafnium oxide) was analyzed by constant voltage stress (CVS) at the nanoscale using conductive atomic force microscopy (cAFM) with the probe tip directly in contact to the dielectric layer. The results were evaluated assuming a Weibull failure distribution for the dielectrics under voltage stress, and a good fit was obtained for the measurement data. This indicates that CVS measurements at the nanoscale can be applied for inline characterization of as-deposited dielectrics without the need for gate electrodes. In addition, time-to-breakdown extracted from the CVS using cAFM was compared to data retrieved from CVS measurements using conventional current-voltage measurements on samples with gate electrodes. In particular, area scaling of CVS data over eight orders of magnitude using cAFM was performed for the first time. The evaluation indicates a decent match between macroscopic and nanoscale CVS measurements for the hafnium oxide and silicon dioxide samples. In contrast, significant discrepancies are evident for the silicon nitride samples, which may be related to charge trapping effects.
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77.55.-g Dielectric thin films
73.50.Gr Charge carriers: generation, recombination, lifetime, trapping, mean free paths

Hot-carrier degradation caused interface state profile—Simulation versus experiment

I. Starkov, S. Tyaginov, H. Enichlmair, J. Cervenka, C. Jungemann, S. Carniello, J. M. Park, H. Ceric, and T. Grasser

J. Vac. Sci. Technol. B 29, 01AB09 (2011); http://dx.doi.org/10.1116/1.3534021 (8 pages)

Online Publication Date: 19 January 2011

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Hot-carrier degradation is associated with the buildup of defects at or near the silicon/silicon dioxide interfaced of a metal-oxide-semiconductor transistor. However, the exact location of the defects, as well as their temporal buildup during stress, is rarely studied. In this work we directly compare the experimental interface state density profiles generated during hot-carrier stress with simulation results obtained by a hot-carrier degradation model. The developed model tries to capture the physical picture behind hot-carrier degradation in as much detail as feasible. The simulation framework includes a transport module, a module describing the microscopic mechanisms of defect generation, and a module responsible for the simulation of degraded devices. Due to the model complexity it is very important to perform a thorough check of the output data of each module before it is used as the input for the next module. In this context a comparison of the experimental interface state concentration observed by the charge-pumping technique with the simulated one is of great importance. Obtained results not only show a good agreement between experiment and theory but also allow us to draw some important conclusions. First, we demonstrate that the multiple-particle mechanism of Si–H bond breakage plays a significant role even in the case of a high-voltage device. Second, the absence of the lateral shift of the charge-pumping signal means that no bulk oxide charge buildup occurs. Finally, the peak of interface state density corresponds to the peak of the carrier acceleration integral and is markedly shifted from typical markers such as the maximum of the electric field or the carrier temperature. This is because the degradation is controlled by the carrier distribution function and simplified schemes of hot-carrier treatment (based on the mentioned quantities) fail to describe the matter.
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72.20.Ht High-field and nonlinear effects
73.40.Qv Metal-insulator-semiconductor structures (including semiconductor-to-insulator)

Reliability studies on Ta2O5 high-κ dielectric metal-insulator-metal capacitors prepared by wet anodization

N. Sedghi, W. Davey, I. Z. Mitrovic, and S. Hall

J. Vac. Sci. Technol. B 29, 01AB10 (2011); http://dx.doi.org/10.1116/1.3532823 (8 pages)

Online Publication Date: 19 January 2011

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The temperature dependence of leakage current for tantalum oxide metal-insulator-metal capacitors has been investigated over the temperature range 20–160 °C. The leakage current shows an increase with temperature and the conduction mechanism at medium to high electric fields is in agreement with the modified Poole–Frenkel model. The activation energy of the dominant deep trapping center in the oxide is calculated using this model. Constant voltage and constant current stress have been applied to the devices and the effect of stress conditions on leakage current, breakdown voltage, and high frequency capacitance-voltage have been investigated. Early oxide breakdown or time-dependent dielectric breakdown was observed during constant voltage and constant current stress, in which the former is a function of stress time and applied voltage or current. There is an increase in leakage current with time during the constant voltage stress, presumably due to generation of positive defect states. This is also apparent from the decrease in voltage with time during constant current stress. Degradation of the oxides by constant current stress and its effect on the oxide leakage current (or stress induced leakage current) at various constant current values and stress times has also been investigated and is discussed in this article.
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85.30.-z Semiconductor devices
84.32.Tt Capacitors
back to top High-k Dielectrics for DRAM

Electrical characteristics of Ti–Ta–O based MIM capacitors

M. Lukosius, C. Baristiran Kaynak, Ch. Wenger, G. Ruhl, and S. Rushworth

J. Vac. Sci. Technol. B 29, 01AC01 (2011); http://dx.doi.org/10.1116/1.3534020 (6 pages) | Cited 1 time

Online Publication Date: 14 January 2011

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Amorphous Ti–Ta–O thin films were deposited by the atomic-vapor deposition technique for metal-insulator-metal (MIM) applications. Depositions were carried out at 400 °C on 200-mm Si (100) wafers using TiN and TaN as bottom electrode materials. The comparison of electrical properties of MIM capacitors was done after physical-vapor deposited growth of different top electrodes, namely, Au, TiN, TaN, and Ti. Capacitance-voltage measurements revealed that the dielectric constant of 50 can be reached if Ti–Ta–O layers are deposited on TiN and if Au, TaN, or Ti is used as the top electrode. The k value is reduced to 37 if TaN is used as bottom electrode. However, if TiN is used as the top electrode, the k value of the stack is reduced by a factor of 3, from 50 to 17, independent of whether TiN or TaN are used as bottom electrodes. The lowest leakage current values ( ∼ 10−8 A/cm2) were observed when gold was used as the top electrode, whereas it increased by 3 orders of magnitude if the top electrode was changed to TiN and even more if the top electrode was changed to TaN or Ti.
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84.32.Tt Capacitors

Macroscopic and microscopic electrical characterizations of high-k ZrO2 and ZrO2/Al2O3/ZrO2 metal-insulator-metal structures

Dominik Martin, Matthias Grube, Wenke Weinreich, Johannes Müller, Lutz Wilde, Elke Erben, Walter M. Weber, Johannes Heitmann, Uwe Schröder, Thomas Mikolajick, and Henning Riechert

J. Vac. Sci. Technol. B 29, 01AC02 (2011); http://dx.doi.org/10.1116/1.3523397 (8 pages) | Cited 1 time

Online Publication Date: 14 January 2011

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In order for sub-10 nm thin films of ZrO2 to have a dielectric constant larger than 30 they need to be crystalline. This is done by either depositing the layer at higher temperatures or by a postdeposition annealing step. Both methods induce high leakage currents in ZrO2 based dielectrics. In order to understand the leakage a thickness series of ultrathin ZrO2 and nanolaminate ZrO2/Al2O3/ZrO2 (ZAZ) films, deposited by atomic layer deposition, was investigated. After deposition these films were subjected to different rapid thermal annealing (RTA) processes. Grazing incidence x-ray diffraction and transmission electron microscopy yield that the crystallization of ZrO2 during deposition is dependent on film thickness and on the presence of an Al2O3 sublayer. Moreover, the incorporation of Al2O3 prevents crystallites from spanning across the entire film during RTA. C-V and I-V spectroscopies show that after a 650 °C RTA in N2 the capacitance equivalent oxide thickness of 10 nm ZAZ films is reduced to 1.0 nm while maintaining low leakage currents of 3.2×10−8 A/cm2 at 1 V. Conductive atomic force microscopy studies yield that currents are not associated with significant morphological features in amorphous layers. However, after crystallization, the currents at crystallite grain boundaries are increased in ZrO2 and ZAZ films.
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73.40.Rw Metal-insulator-metal structures
68.55.A- Nucleation and growth
61.72.Mm Grain and twin boundaries
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
81.40.Gh Other heat and thermomechanical treatments
77.55.-g Dielectric thin films

Atomic-scale engineering of future high-k dynamic random access memory dielectrics: The example of partial Hf substitution by Ti in BaHfO3

P. Dudek, G. Lupina, G. Kozłowski, P. Zaumseil, J. Bauer, O. Fursenko, J. Dabrowski, R. Schmidt, G. Lippert, H.-J. Müssig, T. Schroeder, D. Schmeißer, and E. Zschech

J. Vac. Sci. Technol. B 29, 01AC03 (2011); http://dx.doi.org/10.1116/1.3521487 (7 pages) | Cited 1 time

Online Publication Date: 18 January 2011

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Controlled substitution of Hf4+ by Ti4+ ions in thin BaHfO3 was investigated in view of future dynamic random access memory (DRAM) applications. The 50% substitution of Hf ions reduces the crystallization temperature by about 200 °C with respect to BaHfO3 layers making the BaHf0.5Ti0.5O3 layers compatible with DRAM processing. The resulting cubic BaHf0.5Ti0.5O3 dielectrics show k ∼ 90 after rapid thermal annealing at 700 °C which is three times higher than for BaHfO3 at similar temperatures. Leakage current values of 4×10−5 A/cm2 at 0.5 V for Pt/BaHf0.5Ti0.5O3/TiN capacitors with capacitance equivalent thickness <0.8 nm are achieved. Synchrotron-based photoelectron spectroscopy in combination with nanoscopic conductive atomic force microscopy measurements reveals that the use of high work function electrodes and homogeneous film deposition techniques is crucial for controlling the leakage current.
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84.30.Sk Pulse and digital circuits
84.32.Tt Capacitors

Influence of precursor chemistry and growth temperature on the electrical properties of SrTiO3-based metal-insulator-metal capacitors grown by atomic layer deposition

H. García, H. Castán, A. Gómez, S. Dueñas, L. Bailón, K. Kukli, M. Kariniemi, M. Kemell, J. Niinistö, M. Ritala, and M. Leskelä

J. Vac. Sci. Technol. B 29, 01AC04 (2011); http://dx.doi.org/10.1116/1.3525280 (5 pages)

Online Publication Date: 19 January 2011

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SrTiO3 thin films were grown to thicknesses in the range of 18–30 nm by atomic layer deposition using Sr(iPr3Cp)2 and (CpMe5)Ti(OMe)3 as strontium and titanium precursors at 250 and 300 °C. Water or ozone was used as oxygen precursor. The films were amorphous in as-deposited state, but crystallized as cubic SrTiO3 after annealing at 650 °C. The highest permittivity values, 60–65, were achieved in the films deposited with ozone at 300 °C. The films grown at 250 °C tended to possess markedly lower leakage currents than those grown at 300 °C.
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84.32.Tt Capacitors
68.55.A- Nucleation and growth
73.40.Rw Metal-insulator-metal structures
81.40.Gh Other heat and thermomechanical treatments
77.22.Ch Permittivity (dielectric function)
77.55.-g Dielectric thin films

Applicability of molecular beam deposition for the growth of high-k oxides

Matthias Grube, Dominik Martin, Walter M. Weber, Thomas Mikolajick, Oliver Bierwagen, Lutz Geelhaar, and Henning Riechert

J. Vac. Sci. Technol. B 29, 01AC05 (2011); http://dx.doi.org/10.1116/1.3526718 (3 pages) | Cited 1 time

Online Publication Date: 19 January 2011

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Following the demand of replacing conventional dielectrics in the semiconductor industry, a material screening for new high-k dielectrics is necessary. In this article, the molecular beam deposition is presented as a versatile and valuable tool for growing dielectric films. ZrO2 was chosen as an example to demonstrate the capability of molecular beam deposition to grow thin high-k dielectrics in a metal-insulator-metal stack. A k-value from 21 to 26 could be achieved for as-grown films. This could be improved even further up to 30 by performing postdepositions anneals that result in a capacitance equivalent thickness of 1.5 nm at a leakage current density of 1.5×10−7 A/cm2. In addition, the crystallization behavior of ZrO2 was investigated.
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77.55.D- High-permittivity gate dielectric films
77.55.F- High-permittivity capacitive films
73.40.Rw Metal-insulator-metal structures
68.55.A- Nucleation and growth
81.15.Hi Molecular, atomic, ion, and chemical beam epitaxy

Temperature dependence of TaAlOx metal-insulator-metal capacitors

M. K. Hota, S. Mallik, C. K. Sarkar, and C. K. Maiti

J. Vac. Sci. Technol. B 29, 01AC06 (2011); http://dx.doi.org/10.1116/1.3535558 (5 pages)

Online Publication Date: 19 January 2011

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Structural and electrical properties of amorphous tantalum aluminum oxide (TaAlOx) films deposited using rf magnetron sputtering are investigated using metal-insulator-metal (MIM) capacitor structures with Au as metal electrodes. Crystallinity of the deposited films was studied using grazing incidence x-ray diffraction analysis. The frequency dependence of temperature coefficient of capacitance, an important parameter for precision MIM capacitors, is studied using the Au/TaAlOx/Au stacked layer. The effects of annealing temperature and the ambient on the physical and electrical properties of TaAlOx-based high-k MIM capacitors are reported. Low nonlinearity in capacitance values was found for samples annealed in O2 ambient. Dielectric loss and permittivity are found to increase with increase in temperature.
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84.32.Tt Capacitors
85.40.Sz Deposition technology

Evaluation of the electrical and physical properties of thin calcium titanate high-k insulators for capacitor applications

A. Krause, W. Weber, A. Jahn, K. Richter, D. Pohl, B. Rellinghaus, U. Schröder, J. Heitmann, and T. Mikolajick

J. Vac. Sci. Technol. B 29, 01AC07 (2011); http://dx.doi.org/10.1116/1.3521507 (5 pages) | Cited 1 time

Online Publication Date: 19 January 2011

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Thin calcium titanate (CaTiO3) films are investigated as promising insulator materials with very high-k values for future microelectronic devices such as metal-insulator-metal (MIM) capacitors and field-effect transistor gate stacks. MIM stacks were deposited by sputtering under UHV conditions without breaking vacuum. A capacitance equivalent thickness of 1.3 nm with a leakage current density of 1×10−7 A/cm2 at 1 V was achieved with deposition temperatures of 550 °C on Pt as bottom electrode. The effect of different electrode materials was studied, resulting in leakage densities correlating directly to the different work function values. grazing incidence x-ray diffraction and high-resolution transmission electron microscopy images are analyzed to study the crystallization behavior. As grown CaTiO3 at 550 °C exhibits crystallites in an amorphous matrix. A dielectric constant of k ≈ 93 was obtained for crystallized films.
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85.30.Tv Field effect devices
84.32.Tt Capacitors
81.15.Cd Deposition by sputtering
77.55.-g Dielectric thin films
73.61.Ng Insulators
77.22.Ch Permittivity (dielectric function)

Analysis of leakage current mechanisms in RuO2–TiO2–RuO2 MIM structures

J. Racko, M. Mikolášek, L. Harmatha, J. Breza, B. Hudec, K. Fröhlich, J. Aarik, A. Tarre, R. Granzner, and F. Schwierz

J. Vac. Sci. Technol. B 29, 01AC08 (2011); http://dx.doi.org/10.1116/1.3534022 (8 pages) | Cited 1 time

Online Publication Date: 21 January 2011

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We present an advanced model of current transport in MIM structures and demonstrate its possible utilization in analyzing the leakage current in RuO2–TiO2–RuO2 metal-insulator-metal structures. The model comprehends an important role of traps present in high-κ materials in the transport of carriers through the insulator and can provide information about their spatial and energy distribution in the insulator. Through numerical analysis, a significant decrease of defects density in RuO2–TiO2–RuO2 MIM structures was identified after annealing at 300 °C.
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73.40.Rw Metal-insulator-metal structures
71.55.-i Impurity and defect levels
81.40.Gh Other heat and thermomechanical treatments

Atomic layer deposition grown metal-insulator-metal capacitors with RuO2 electrodes and Al-doped rutile TiO2 dielectric layer

B. Hudec, K. Hušeková, E. Dobročka, J. Aarik, R. Rammula, A. Kasikov, A. Tarre, A. Vincze, and K. Fröhlich

J. Vac. Sci. Technol. B 29, 01AC09 (2011); http://dx.doi.org/10.1116/1.3534023 (5 pages) | Cited 2 times

Online Publication Date: 21 January 2011

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Metal-insulator-metal structures for dynamic random access memory capacitor applications were prepared by atomic layer deposition. Rutile TiO2 dielectric layers were grown on top of RuO2 electrodes. TiO2 layers were doped in different ways by aluminum and these structures were compared to undoped ones. C-V and J-V measurements show that Al doping reduces the capacitance density of the stacks while reducing leakage current. Varying the initial Al doping profile did not change the electrical properties of the stacks. Leakage current analysis revealed that the current in the doped samples is controlled by Schottky emission.
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84.32.Tt Capacitors
84.30.Sk Pulse and digital circuits
back to top Resistive Switching in Dielectrics

Nanostructured resistive memory cells based on 8-nm-thin TiO2 films deposited by atomic layer deposition

C. Kügeler, J. Zhang, S. Hoffmann-Eifert, S. K. Kim, and R. Waser

J. Vac. Sci. Technol. B 29, 01AD01 (2011); http://dx.doi.org/10.1116/1.3536487 (5 pages) | Cited 1 time

Online Publication Date: 14 January 2011

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Nanostructured Pt/TiO2/Ti/Pt crosspoint junctions with lateral dimensions as small as 100×100 nm2 were prepared on silicon substrates by the use of nanoimprint lithography and reactive ion etching to structure the metal electrodes combined with atomic layer deposition of the resistive switching TiO2 layer. A thickness of the amorphous TiO2 films of only 8 nm already led to functioning nanocrosspoint structures with respect to resistance switching behavior. As-prepared structures exhibited very high-resistance states with diodelike I-V characteristics. After a negative-current-driven electroforming step, the devices could be repeatably switched between two stable states. The switching characteristics were found to depend strongly on the resistance state after the electroforming procedure. Low resistance values around 1 kΩ led to high current switching, and resistances of about 10 kΩ led to low current switching. Furthermore, multilevel switching was demonstrated by the use of 10 and 50 ns set voltage pulses.
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81.16.Nd Micro- and nanolithography

On the role of Ti adlayers for resistive switching in HfO2-based metal-insulator-metal structures: Top versus bottom electrode integration

Ch. Walczyk, Ch. Wenger, D. Walczyk, M. Lukosius, I. Costina, M. Fraschke, J. Dabrowski, A. Fox, D. Wolansky, S. Thiess, E. Miranda, B. Tillack, and T. Schroeder

J. Vac. Sci. Technol. B 29, 01AD02 (2011); http://dx.doi.org/10.1116/1.3536524 (7 pages) | Cited 3 times

Online Publication Date: 18 January 2011

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The authors demonstrate bipolar resistive switching in TiN/HfO2/Ti(top)/TiN devices using a (Bi) complementary metal-oxide semiconductor (CMOS) compatible technology process. The device performance includes a cycling endurance in dc sweeping mode >103. The results suggest that HfO2-based metal-insulator-metal devices with Si CMOS compatible metal electrodes may be well suited for future embedded nonvolatile memory applications. However, hysteretic current-voltage characteristics were only observed for a Ti top adlayer, whereas a Ti bottom adlayer integration did not show any resistive switching effect. Using x-ray photoelectron spectroscopy, the authors examined the interface chemistry of the Ti/HfO2 interface. It is clearly observed that Ti top adlayer deposition results in an increased nitrogen- and oxygen-gettering activity in contrast to Ti bottom adlayer. It follows that the formation of a nonstoichiometric HfO2 layer at the Ti/HfO2 interface is crucial for resistive switching.
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82.80.Pv Electron spectroscopy (X-ray photoelectron (XPS), Auger electron spectroscopy (AES), etc.)
82.65.+r Surface and interface chemistry; heterogeneous catalysis at surfaces
79.60.Dp Adsorbed layers and thin films
73.40.Rw Metal-insulator-metal structures
68.43.Mn Adsorption kinetics
61.66.Bi Elemental solids
61.66.Dk Alloys
85.30.Tv Field effect devices

Stochastic model of the resistive switching mechanism in bipolar resistive random access memory: Monte Carlo simulations

A. Makarov, V. Sverdlov, and S. Selberherr

J. Vac. Sci. Technol. B 29, 01AD03 (2011); http://dx.doi.org/10.1116/1.3521503 (5 pages) | Cited 1 time

Online Publication Date: 18 January 2011

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A stochastic model of the resistive switching mechanism in bipolar metal-oxide-based resistive random access memory (RRAM) is presented. The distribution of electron occupation probabilities obtained is in good agreement with previous work. In particular, it is shown that a low occupation region is formed near the cathode. Our simulations of the temperature dependence of the electron occupation probabilities near the anode and the cathode demonstrate a high robustness of the low and high occupation regions. This result indicates that a decrease in the switching time with increasing temperature cannot be explained only by reduced occupations of the vacancies in the low occupation region, but is rather related to an increase in the mobility of the oxide ions. A hysteresis cycle of a RRAM simulated with the stochastic model is in agreement with experimental results.
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84.30.Sk Pulse and digital circuits

Temperature dependence of the resistance switching effect studied on the metal/YBa2Cu3O6+x planar junctions

Milan Tomasek, Tomas Plecenik, Martin Truchly, Jaroslav Noskovic, Tomas Roch, Miroslav Zahoran, Stefan Chromik, Mariana Spankova, Peter Kus, and Andrej Plecenik

J. Vac. Sci. Technol. B 29, 01AD04 (2011); http://dx.doi.org/10.1116/1.3521408 (5 pages) | Cited 1 time

Online Publication Date: 18 January 2011

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The resistive switching (RS) effect observed in capacitorlike metal/insulator/metal junctions belongs to the most promising candidates for next generation of memory cell technology. It is based on a sudden change of the junction resistance caused by an electric field applied to the metal electrodes. The aim of this work was to study this effect on the structure metal/YBCO6/YBCO7, where YBCO7 is a metallic phase and YBCO6 is an insulator phase that arises spontaneously by outdiffusion of oxygen from a few nanometers wide YBCO surface layer. Oriented YBa2Cu3O7 thin films were prepared by the method of magnetron sputtering and consequently planar structures with metal-YBCO junction were made by the means of the optical lithography, ion etching, and vacuum evaporation. On these junctions, the authors have studied the temperature dependence of the RS effect with I-V and dI/dV-V transport measurements down to liquid He temperature. They have determined the temperature dependence of the RS effect threshold voltage in the temperature range 100–300 K and showed that this dependency is compatible with common idea of oxygen ion migration under electric field within the YBCO surface layer.
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73.40.Rw Metal-insulator-metal structures
66.30.Qa Electromigration
81.65.Cf Surface cleaning, etching, patterning
81.15.Cd Deposition by sputtering
74.78.-w Superconducting films and low-dimensional structures
74.72.-h Cuprate superconductors

Mesoscopic nature of the electron transport in electroformed metal-insulator-metal switches

E. Miranda

J. Vac. Sci. Technol. B 29, 01AD05 (2011); http://dx.doi.org/10.1116/1.3525281 (5 pages) | Cited 1 time

Online Publication Date: 18 January 2011

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The reversible diode- to resistorlike transition occurring in electroformed metal-insulator-metal structures caused by the application of successive voltage/current sweeps or pulses is ascribed to the modulation of the quantum transmission properties of atomic-sized filamentary paths. Closed-form expressions for the high resistance state (HRS) and low resistance state (LRS) I-V characteristic based on the Landauer formula for electron transport in mesoscopic systems are reported. From the simulation viewpoint, the switch from the exponential (HRS) to the linear (LRS) I-V characteristic and back is achieved by simply changing a model parameter related to the size of the constriction’s bottleneck. It is shown that the proposed model exhibits two limiting cases that are consistent with the experimental observations reported in literature.
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85.30.Tv Field effect devices
back to top Dielectrics for Non-Volatile Memories

Charge retention phenomena in CT silicon nitride: Impact of technology and operating conditions

G. Ghidini, N. Galbiati, E. Mascellino, C. Scozzari, A. Sebastiani, S. Amoroso, C. Monzio Compagnoni, A. S. Spinelli, A. Maconi, R. Piagge, A. Del Vitto, M. Alessandri, I. Baldi, E. Moltrasio, G. Albini, et al.

J. Vac. Sci. Technol. B 29, 01AE01 (2011); http://dx.doi.org/10.1116/1.3532541 (4 pages) | Cited 2 times

Online Publication Date: 10 January 2011

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The aim of this work is to understand charge loss mechanisms in TANOS stack for which charge retention is monitored just after programming in an almost continuous way and voltage is applied during retention experiments in order to obtain zero electric field either on alumina or tunnel oxide. The charge loss mechanisms in TANOS stack can be a quite complicated process: An initial fast DT from interface traps localized at SiN/alumina interface, followed by charge loss through alumina from bulk traps in SiN which influences charge redistribution towards the tunnel oxide, observed only in Si-rich SiN. Programming voltage and stack composition impact trapped charge localization and hence charge redistribution and charge loss, even if the same initial Vfb is considered in charge retention experiments. While the charge loss through tunnel oxide is a DT, the charge loss through alumina depends on temperature and it is the main component of the charge loss in retention experiments for longer time.
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72.80.Sk Insulators
72.20.Jv Charge carriers: generation, recombination, lifetime, and trapping
71.70.-d Level splitting and interactions

Study of parasitic trapping in alumina used as blocking oxide for nonvolatile memories

J. P. Colonna, M. Bocquet, G. Molas, N. Rochat, P. Blaise, H. Grampeix, C. Licitra, D. Lafond, L. Masoero, V. Vidal, J. P. Barnes, M. Veillerot, and K. Yckache

J. Vac. Sci. Technol. B 29, 01AE02 (2011); http://dx.doi.org/10.1116/1.3535552 (5 pages)

Online Publication Date: 26 January 2011

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Alumina layers deposited by atomic layer deposition followed by rapid thermal anneal were characterized. We found that the crystallization of alumina in γ-phase occurs between 700 and 850 °C. Optical band gap, stress, and density were found to increase upon crystallization. Hydrogen content in alumina was characterized by ToF-SIMS and infrared spectroscopy. We found that annealing ambience has a strong influence on hydrogen concentration: oxygen favors hydrogen desorption from alumina. Finally, charge trapping in alumina was characterized by C(V) measurements. A strong correlation between hydrogen concentration and trapping was established.
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68.55.-a Thin film structure and morphology
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
81.40.Gh Other heat and thermomechanical treatments
78.30.Hv Other nonmetallic inorganics
68.43.Nr Desorption kinetics
78.20.Ci Optical constants (including refractive index, complex dielectric constant, absorption, reflection and transmission coefficients, emissivity)

Synthesis and characterization of DyScO films deposited on Si and Si-rich SiN by atomic layer deposition for blocking layer replacement in TANOS stack

A. Lamperti, E. Cianci, U. Russo, S. Spiga, O. Salicio, G. Congedo, and M. Fanciulli

J. Vac. Sci. Technol. B 29, 01AE03 (2011); http://dx.doi.org/10.1116/1.3534024 (9 pages) | Cited 1 time

Online Publication Date: 26 January 2011

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In the view of improving standard TANOS stacks, a possible route is the replacement of Al2O3 blocking oxide with materials with higher dielectric constant κ, as this would increase the electric field across the tunnel oxide. A possible solution is to integrate rare earth scandates. Among the scandates, DyScO3 appears as an attractive material due to the reported high-κ value. Films with 10–30 nm nominal thickness were grown by atomic layer deposition (ALD) on Si substrates for process optimization and structural characterization. Sc(thd)3 and Dy(thd)3 were used as Sc and Dy precursors and O3 as oxidizing agent. First, Sc2O3 and Dy2O3 growth process was optimized by changing growth temperature (Tg) and ALD cycle. The best conditions for the deposition of the ternary DyScO films were found to be Tg = 350 °C and Dy:Sc = 1:1 pulsing ratio. Optimized films were also grown on Si-rich SiN for integration as blocking oxide. After deposition, films were subjected to rapid thermal annealing up to 1030 °C to check their thermal stability. Film thickness was checked by x-ray reflectivity, together with roughness and electron density. Film crystallinity was investigated by grazing incidence x-ray diffraction. Film uniformity and thermal stability were explored by time-of-flight secondary ion mass spectrometry (ToF-SIMS) depth profiles. Dielectric constant κ was extracted from capacitance-voltage (C-V) electrical measurements. As deposited amorphous DyScO films on silicon remain amorphous after annealing up to 900 °C. Film electron density reduces while thickness increases with annealing, surface roughness remaining at ∼ 1.5 nm. The measured Sc:Dy atomic ratio by total x-ray fluorescence analyses is 1.33 in the as deposited film. ToF-SIMS depth profiles showed that film uniformity and composition is not preserved at 900 °C, in films deposited on Si, as major Si diffusion affects the ternary oxide. Only at 600 °C the diffusion phenomena and film composition are preserved. The extracted DyScO dielectric constant is κ ∼ 20 in films annealed at 600 °C on Si. When deposited on Si-rich SiN, DyScO uniformity remains well preserved up to 900 °C, with an improvement of the thermal stability with respect to deposition on Si. Si diffusion is evident at 1030 °C only. The κ-value extracted from C-V resulted to be κ ∼ 20.
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68.55.aj Insulators
77.22.Ch Permittivity (dielectric function)
77.55.D- High-permittivity gate dielectric films
73.61.Ng Insulators
68.60.Dv Thermal stability; thermal effects
68.35.bt Other materials

Evaluation of DyScOx as an alternative blocking dielectric in TANOS memories with Si3N4 or Si-rich SiN charge trapping layers

G. Congedo, S. Spiga, U. Russo, A. Lamperti, O. Salicio, E. Cianci, and M. Fanciulli

J. Vac. Sci. Technol. B 29, 01AE04 (2011); http://dx.doi.org/10.1116/1.3533765 (7 pages) | Cited 2 times

Online Publication Date: 26 January 2011

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Dysprosium scandate DyScOx with a κ value of ∼ 20 has been investigated as blocking dielectric in charge trapping memory capacitors. DyScOx films with 28 and 18 nm thicknesses are deposited by atomic layer deposition on two different kinds of silicon nitride used as charge trapping layer, while SiO2 is used as tunnel oxide and TaN is used as metal gate. Memory capacitors with Al2O3 as blocking layer with similar equivalent oxide thickness (EOT) to DyScOx are also characterized as benchmarks. DyScOx thermal stability on both Si3N4 and Si-rich SiN at annealing temperatures up to 900 °C demonstrates the complementary metal-oxide semiconductor process compatibility of the oxide. Especially when deposited on Si-rich SiN, comparable program and slightly better retention performance with Al2O3 are observed for DyScOx, whereas erase still needs to be improved. Some variations in the electrical performance are found between the DyScOx-based stacks with different charge trapping layer and have been discussed. Scaling the total stack EOT by reducing DyScOx thickness from 28 to 18 nm allows a large program/erase window, but with the penalty of an increased charge loss during retention. Our results suggest that the key factors in further improvement of DyScOx as blocking dielectric are the dielectric quality and leakage current.
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84.32.Tt Capacitors
84.30.Sk Pulse and digital circuits
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