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Nov 1985

Volume 3, Issue 6, pp. 1581-1724


A step‐and‐repeat x‐ray exposure system for 0.5 μm pattern replication

T. Hayasaka, S. Ishihara, H. Kinoshita, and N. Takeuchi

J. Vac. Sci. Technol. B 3, 1581 (1985); http://dx.doi.org/10.1116/1.582942 (6 pages) | Cited 3 times

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A new step‐and‐repeat x‐ray exposure system has been developed to establish practical submicron x‐ray lithography. Penumbra and run‐out error have been determined on the basis of resolution consideration and alignment accuracy analysis. The fundamental system parameters have been derived for constructing an efficient and accurate exposure system. To realize such a system, certain new technologies have been developed. (1) A high power Si–Kα x‐ray source brings a large x‐ray flux onto the wafer through a silicon nitride mask membrane. (2) The optical mark and gap detection method is connected to a precise alignment mechanism placed on an x–y table designed for wafer stepping. (3) This construction ensures atmospheric environment exposure. (4) The exposure system operation is fully automatic thanks to microprocessors. A 0.5 μm pattern has been accurately replicated, and a ±0.15 μm alignment accuracy has been achieved using this exposure system.
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85.40.Bh Computer-aided design of microcircuits; layout and modeling
81.65.-b Surface treatments
78.70.-g Interactions of particles and radiation with matter

X‐ray lithography for sub‐100‐nm‐channel‐length transistors using masks fabricated with conventional photolithography, anisotropic etching, and oblique shadowing

S. Y. Chou, Henry I. Smith, and D. A. Antoniadis

J. Vac. Sci. Technol. B 3, 1587 (1985); http://dx.doi.org/10.1116/1.582943 (3 pages) | Cited 2 times

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In order to fabricate submicrometer‐channel‐length MOSFET’s using x‐ray lithography, a novel mask fabrication technique was developed. The mask enabled PMMA lines with widths of 100, 160, 250, 270, and 5000 nm to be exposed simultaneously on the same substrate. The mask consists of a polyimide membrane with narrow absorber lines on the front side (facing the substrate) and coarse absorber patterns on the back side (facing the x‐ray source). The narrow absorber lines are formed by oblique shadowing of gold onto sidewalls of rectangular mesas molded on the polyimide from wells anisotropically etched in (110)Si. As a result, exposed lines are straight, controlled in width to ∼10%, and have very small edge ripple. Source and drain pattern areas are formed in gold on the back surface of the membrane by conventional photolithography and ion beam etching. PMMA lines exposed with the x‐ray mask were used for channel masking during source–drain ion implantation. Operating MOSFET’s were fabricated with minimum channel length estimated to be 75 nm.
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85.30.Tv Field effect devices
81.65.-b Surface treatments
78.70.-g Interactions of particles and radiation with matter
07.85.-m X- and γ-ray instruments

Plasma‐processed positive and negative resist behavior of obliquely deposited amorphous P–Se films

P. K. Gupta, Ajay Kumar, L. K. Malhotra, and K. L. Chopra

J. Vac. Sci. Technol. B 3, 1590 (1985); http://dx.doi.org/10.1116/1.582944 (4 pages) | Cited 4 times

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Thin films of amorphous phosphorus decaselenide (P4Se10) have been explored for lithographic applications. Depending on the substrate temperature during plasma etching in CF4 gas, either positive or negative resist behavior is observed. The effects of substrate temperature and exposure time on etching characteristics are discussed. Contrast values of 2.5 and 2.9 for positive and negative resist, respectively, have been obtained.
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81.65.-b Surface treatments
82.65.+r Surface and interface chemistry; heterogeneous catalysis at surfaces

Application of polymer–bisazide composite system negative resists to electron beam lithography

Katsumi Tanigaki, Masayoshi Suzuki, and Yoshitake Ohnishi

J. Vac. Sci. Technol. B 3, 1594 (1985); http://dx.doi.org/10.1116/1.582945 (6 pages)

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Pattern profiles achieved in composite resists of a polymer and a bisazide compound tend to be rectangular, in spite of electron backscattering from substrates. This phenomenon is explained by the bisazide concentration dependence of the composite resist sensitivity to electron beam and the depth profile of bisazide distribution in a polymer film. An optimum amount of bisazide compound, needed to obtain the highest sensitization, exists. It does not depend on molecular weight, but on the kind of polymers used. An excessive amount of bisazide compound incorporation is found to reduce sensitivity. Bisazide compounds distribute to a great extent in the vicinity of a substrate during a prebaking process. These factors reduce the backscattering problem taking place in electron beam lithography to obtain resist patterns with vertical walls.
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81.05.Lg Polymers and plastics; rubber; synthetic and natural fibers; organometallic and organic materials
81.65.-b Surface treatments
79.20.Kz Other electron-impact emission phenomena

Flow visualization in low pressure chambers using laser‐induced biacetyl phosphorescence

Fumikazu Itoh, George Kychakoff, and Ronald K. Hanson

J. Vac. Sci. Technol. B 3, 1600 (1985); http://dx.doi.org/10.1116/1.582946 (4 pages) | Cited 3 times

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Two optical probes, utilizing laser‐induced biacetyl phosphorescence recorded by an image‐intensified solid state camera, have been developed and used to characterize velocity fields in a low pressure chamber (similar to a plasma‐enhanced CVD reactor). The method has been demonstrated at pressures as low as 0.5 Torr; measurements at lower pressures should be possible. Reactor flow velocity fields influence gas residence times and deposition rates. The method discussed in this paper can be used to investigate these effects.
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81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
51.70.+f Optical and dielectric properties
47.70.-n Reactive and radiative flows
47.80.-v Instrumentation and measurement methods in fluid dynamics

Some etch properties of doped and undoped silicon oxide films formed by atmospheric pressure and plasma‐activated chemical vapor deposition

F. Gualandris, G. U. Pignatel, S. Rojas, and J. Scannell

J. Vac. Sci. Technol. B 3, 1604 (1985); http://dx.doi.org/10.1116/1.582947 (5 pages) | Cited 1 time

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Silicon oxide films formed using two different chemical vapor deposition (CVD) techniques have been characterized by selected etching properties, both in dry (plasma) etching and in wet (chemical) etching. Dry etching was accomplished using CHF3+O2 in a reactive ion etching (RIE) system. The films investigated are undoped silicon oxide, phosphorus‐doped silicon oxide at 4 mol % P2O5, and phosphorus‐doped silicon oxide at 9.5 mol % P2O5. The effects of densification, i.e., thermal treatments carried out at 900 °C in an inert atmosphere (N2) and at 920 °C in steam, are discussed in detail. A decrease in etch rate is observed and considered to be an indication of the structural changes that lead to less porous and more stable films.
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81.05.Je Ceramics and refractories (including borides, carbides, hydrides, nitrides, oxides, and silicides)
81.65.-b Surface treatments
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
81.40.Gh Other heat and thermomechanical treatments
68.60.-p Physical properties of thin films, nonelectronic

Oxide formation on GaAs exposed to CF4+O2 plasma

Hirohiko Sugahara and Masamitsu Suzuki

J. Vac. Sci. Technol. B 3, 1609 (1985); http://dx.doi.org/10.1116/1.582948 (5 pages) | Cited 2 times

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The effect of CF4+O2 plasma on GaAs is studied using Auger electron spectroscopy and x‐ray photoelectron spectroscopy. AES sputtering profiles and the chemical shift in the Ga 3d photoelectron peak indicate the Ga2O3‐rich oxide formation on the GaAs surface through exposure to CF4+O2 plasma. The increase in the Schottky diode ideality factor n and the decrease in GaAs MESFET transconductance gm as functions of plasma exposure time are explained with this oxide formation. The GaAs MESFET I–V characteristics are improved by removing the Ga2O3‐rich oxide layer with chemical treatment.
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81.65.-b Surface treatments
82.65.+r Surface and interface chemistry; heterogeneous catalysis at surfaces
85.30.Tv Field effect devices
85.30.Hi Surface barrier, boundary, and point contact devices

Mass spectrometric studies of plasma etching of silicon nitride

P. E. Clarke, D. Field, A. J. Hydes, D. F. Klemperer, and M. J. Seakins

J. Vac. Sci. Technol. B 3, 1614 (1985); http://dx.doi.org/10.1116/1.582949 (6 pages) | Cited 9 times

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Basic chemical processes in a CF4/O2 plasma during etching of silicon nitride have been investigated using mass spectrometry. Samples of the discharge are extracted through a quartz capillary and the resulting variations in species abundance at a nitride/oxide interface yield information on etch reaction pathways. Mechanisms of F and CF2 attack and SiF4, N2, NO, and CN product formation are proposed. The experimental data are suitable for application in mass spectrometric endpoint detection.
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81.05.Je Ceramics and refractories (including borides, carbides, hydrides, nitrides, oxides, and silicides)
81.65.-b Surface treatments
82.80.Ms Mass spectrometry (including SIMS, multiphoton ionization and resonance ionization mass spectrometry, MALDI)
82.65.+r Surface and interface chemistry; heterogeneous catalysis at surfaces

Reactive ion etching of SiO2 with vertical sidewalls and its application to ion‐implantation masks for bubble devices

H. Gokan and M. Mukainaru

J. Vac. Sci. Technol. B 3, 1620 (1985); http://dx.doi.org/10.1116/1.582950 (5 pages)

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Silicon dioxide patterns having vertical sidewalls have been obtained without pattern width loss by reactive ion etching in CF4. The polymerization effect, caused by fluorine deficiency in the plasma, is found to influence not only the morphology of the etched resist surface but also the SiO2 etching profiles. The polymerization is greatly reduced by depressing the temperature rise during etching. A temperature‐controlled cathode and a heat sink material are used for this purpose. The polymerization is further reduced by increasing flow rate, by increasing pressure and by decreasing power density. The SiO2 patterns having vertical sidewalls are obtained under the no‐polymerization etching conditions. These SiO2 patterns have been successfully applied to ion‐implantation masks for 16 Mbit bubble devices.
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81.05.Kf Glasses (including metallic glasses)
81.65.-b Surface treatments
85.70.Ge Ferrite and garnet devices
79.20.Rf Atomic, molecular, and ion beam impact and interactions with surfaces
82.65.+r Surface and interface chemistry; heterogeneous catalysis at surfaces

A low temperature process for vapor etching of indium phosphide

H. L. Chang and L. G. Meiners

J. Vac. Sci. Technol. B 3, 1625 (1985); http://dx.doi.org/10.1116/1.582951 (6 pages)

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The vapor of the organic halide, ethylene dibromide (EDB), was used for InP in situ etching. The etching process was carried out in a low pressure (≂50 Pa) flowing system. A two‐zone resistance‐heated furnace was employed such that EDB molecules were decomposed to yield a more reactive form of bromine in the high temperature zone, whereas the substrate was placed in the low temperature zone to avoid thermal degradation of the InP. Surfaces as specular as before etching were obtained by using this technique. The process was studied for substrate temperatures between 120 and 540 °C and for hot zone temperatures between 600 and 900 °C. The etch rate varied between 0.002 and 1.0 μm/min depending on the furnace temperature and the EDB flow rate.
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81.65.-b Surface treatments
82.65.+r Surface and interface chemistry; heterogeneous catalysis at surfaces

Photoluminescence characterization of molecular beam epitaxy grown InxGa1−xAs(0.51<x<0.57)

V. Swaminathan, R. A. Stall, A. T. Macrander, and R. J. Wunder

J. Vac. Sci. Technol. B 3, 1631 (1985); http://dx.doi.org/10.1116/1.582952 (6 pages) | Cited 9 times

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The results of a low temperature 5.5 K photoluminescence study on undoped n‐type InxGa1−xAs(0.51<x<0.57) films grown on InP substrates by molecular beam epitaxy are presented. The photoluminescence spectrum near the band edge is dominated by a single peak of halfwidth 3–8 meV. This peak is attributed to a bound exciton transition for n<5×1015 cm−3 and to a donor‐to‐valence band transition for n>5×1015 cm−3. From the peak energy of this transition the band gap is determined as a function of x and compared with earlier studies. A weak emission band below the main peak, observed frequently in the films, is associated with a donor‐to‐acceptor transition and the acceptor is suggested to be carbon. The spatial variation in composition as determined by the variation in the photoluminescence bands is found to be Δx∼0.003 parallel to the growth direction and much less in the plane of the film. In this respect the molecular beam epitaxy grown films exhibit much less compositional variation compared to liquid phase epitaxy and vapor phase epitaxy films.
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78.40.Fy Semiconductors
68.55.-a Thin film structure and morphology
68.60.-p Physical properties of thin films, nonelectronic

Homo‐ and heteroepitaxial growth of high quality ZnSe by molecular beam epitaxy

R. M. Park, H. A. Mar, and N. M. Salansky

J. Vac. Sci. Technol. B 3, 1637 (1985); http://dx.doi.org/10.1116/1.582953 (4 pages) | Cited 13 times

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ZnSe layers (1–2 μm thick) have been grown by molecular beam epitaxy on both (111) and (100) oriented ZnSe substrates. The layers were grown on atomically clean, single‐crystalline ZnSe surfaces prepared in situ by an Argon‐ion sputtering/annealing process. Homoepitaxial ZnSe layers grown on (111) ZnSe exhibited microtwinning as indicated by reflection high energy electron diffraction (RHEED) observations together with zero detectable excitonic photoluminescence emission. In contrast, layers grown on (100) ZnSe had smooth surfaces, indicated by a streaky RHEED pattern, and exhibited strong 4.2 K excitonic emission at 2.7980 eV (I0α). This can be contrasted with the Ga‐bound excitonic emission at 2.7972 eV (IGa20) observed from layers grown on (100) GaAs substrates.
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68.55.-a Thin film structure and morphology

A simple semiquantitative model for classifying metal–compound semiconductor interface reactivity

J. F. McGilp and I. T. McGovern

J. Vac. Sci. Technol. B 3, 1641 (1985); http://dx.doi.org/10.1116/1.582954 (4 pages) | Cited 4 times

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A scheme for classifying the interfacial reactivity of metal–compound semiconductor systems is presented. The scheme uses a simple bulk model to calculate a ‘‘heat of reaction,’’ which includes the effects of metal–semiconductor anion compound formation and metal–semiconductor cation alloying. The scheme is applied to the layered semiconductors GaSe and MoS2, III–V semiconductor InP, and the II–VI semiconductor CdTe, for a wide range of metals. The resulting classification compares favorably with published experimental data on ultrahigh vacuum cleaved surfaces. For the majority of these interfaces, the reactivity classification is the same as that obtained by considering only metal–semiconductor anion compound formation. However, for the combinations Au–InP, Ni–CdTe, Ni–GaSe, Cu–CdTe, and Cu–GaSe, it is only by including alloying that the combination is classified as reactive, in agreement with experimental data.
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82.65.+r Surface and interface chemistry; heterogeneous catalysis at surfaces
82.60.Cx Enthalpies of combustion, reaction, and formation

Al/SiO2/WSi2/Si double‐level metallization for charge‐coupled‐device imagers

H. L. Babbar, C. N. Anagnostopoulos, and J. R. Fischer

J. Vac. Sci. Technol. B 3, 1645 (1985); http://dx.doi.org/10.1116/1.582955 (5 pages)

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Replacing aluminum with tungsten silicide in Al/SiO2/Al/Si double‐metal systems reduced hillock formation and allowed the reflow of glass for better second‐metal topography. The high contact resistance of tungsten silicide to n+‐Si and poly‐Si was reduced by implanting the tungsten silicide with phosphorus or arsenic. Charge‐coupled‐device (CCD) imagers were fabricated by this technique.
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73.40.Cg Contact resistance, contact potential
85.60.-q Optoelectronic devices
68.55.-a Thin film structure and morphology

Angular dependence of etching yield of single crystal Si in Cl2 reactive ion beam etching

E. Eric Krueger and Arthur L. Ruoff

J. Vac. Sci. Technol. B 3, 1650 (1985); http://dx.doi.org/10.1116/1.582956 (2 pages)

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Reactive ion beam etching yield for lightly doped Si(100) using Cl2 gas in the ion source was measured as a function of current density and angle of incidence. Experiments were performed such that the ion flux delivered to the sample was held constant at each angle. At normal ion incidence etching yield decreased linearly with current density. With constant ion flux to the sample surface the yield remained constant from 0° to 70° angle of incidence.
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81.65.-b Surface treatments
79.20.Rf Atomic, molecular, and ion beam impact and interactions with surfaces
82.65.+r Surface and interface chemistry; heterogeneous catalysis at surfaces

Application of the self‐aligned titanium silicide process to very large‐scale integrated n‐metal‐oxide‐semiconductor and complementary metal‐oxide‐semiconductor technologies

Roger A. Haken

J. Vac. Sci. Technol. B 3, 1657 (1985); http://dx.doi.org/10.1116/1.582957 (7 pages) | Cited 12 times

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This paper reviews recent progress towards integrating the self‐aligned titanium silicide process into VLSI NMOS and CMOS technologies, to simultaneously reduce the gate and junction sheet resistances to below 1 Ω/sq. In addition to reviewing the base line self‐aligned TiSi2 process, the key issues that must be addressed if the process is going to be successfully integrated into a VLSI process flow, without having adverse effects on device parameters, will be discussed. Such issues are how the sheet resistance can be reduced to <1 Ω/sq without bridging between the gate and source/drain regions, the effect of silicide stress on gate oxide integrity, and how both P‐ and N‐type junctions can be silicided without adversely affecting diode or transistor properties. Recent results on the hot electron hardness of silicided devices compared to unsilicided transistors will also be presented. The implementation of the self‐aligned titanium silicide process using rapid thermal processing to simultaneously fabricate transistor gates and junctions with a sheet resistance of 1 Ω/sq will also be described. Using the self‐aligned TiSi2 technology, fully functional VLSI CMOS and NMOS circuits of the 64K static random access memory class of complexity, with 1 μm gates, have been fabricated with yield that is similar to unsilicided parts.
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85.40.Bh Computer-aided design of microcircuits; layout and modeling
73.61.Cw Elemental semiconductors
73.61.Ey III-V semiconductors
73.61.Ga II-VI semiconductors
73.61.Jc Amorphous semiconductors; glasses
73.61.Le Other inorganic semiconductors
73.40.-c Electronic transport in interface structures
85.30.De Semiconductor-device characterization, design, and modeling

Ion implantation of arsenic in chemical vapor deposition tungsten silicide

Tohru Hara, Hiroyuki Takahashi, and Shih‐Chang Chen

J. Vac. Sci. Technol. B 3, 1664 (1985); http://dx.doi.org/10.1116/1.582958 (4 pages) | Cited 1 time

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Impurity profiles in arsenic implanted chemical vapor deposition (CVD) tungsten silicide (WSix) have been studied. Arsenic was implanted in WSi2.6 layer deposited on silicon substrates, and impurity profile measurements were performed by Rutherford backscattering spectrometry (RBS) techniques. Observed profiles in the as‐deposited silicide can be fitted well with calculated Gaussian distribution. Carrier concentration profile measurements of silicon substrates indicate that tailing of the profile due to a channeling did not occur. Therefore, a sufficient masking effect has been achieved by this layer for use in a self‐aligned gate implantation process. When annealing was done, the dissolution of excess silicon occurred from the nonstoichiometry silicide. Arsenic ion implanted into the silicide diffused into the silicon substrate. As a result, deeper junctions with a lower surface concentration is formed by furnace annealing. However, shallow junctions were formed by rapid thermal annealing (RTA).
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61.72.sd Impurity concentration
61.72.sh Impurity distribution
61.72.sm Impurity gradients
61.72.U- Doping and impurity implantation

Influence of dopants and deposition temperatures on the properties of TaSi2/polysilicon films and their thermal oxides

H. Gant, H. Boetticher, and H. R. Deppe

J. Vac. Sci. Technol. B 3, 1668 (1985); http://dx.doi.org/10.1116/1.582959 (8 pages) | Cited 1 time

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Tantalum silicide films were prepared by sputtering from compound targets. The influence of various deposition and process parameters on the TaSi2/poly‐Si film properties and on the quality of thermal oxides grown by dry and steam oxidation on top of the polycide was investigated. In particular, the cleaning procedure of the poly‐Si surface prior to TaSix‐sputtering was varied and elevated substrate temperatures were adjusted during deposition. Furthermore, As‐ or P‐implantations were inserted at various stages of the process sequence to study the properties of oxidized polycide structures present within actual devices. The polycide films were characterized by measurements of the sheet resistivity as well as by x‐ray microprobe analysis and x‐ray diffraction, while the thermal oxides were investigated by cross‐sectional TEM and breakdown strength measurements. At the elevated substrate temperatures during TaSix‐deposition, the sheet resistivity of the as‐deposited and the sintered films decreases and the quality of the thermal oxides increases. At the maximum temperature of 400 °C, best results were obtained for the oxidized polycide structures. The preferential orientation of the TaSi2 crystallites within the polycrystalline layer depends on the process stage of the implantation. These implantations cause an increase of the quality of the thermal oxides on top of the polycides. Best oxides with mean breakdown fields of up to 5 MV/cm—even better than for oxides grown on polysilicon—were obtained by an As implantation process after sintering. Finally, the results were compared with those for TaSi2/poly‐Si films prepared by cosputtering.
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81.15.Cd Deposition by sputtering
73.61.Cw Elemental semiconductors
73.61.Ey III-V semiconductors
73.61.Ga II-VI semiconductors
73.61.Jc Amorphous semiconductors; glasses
73.61.Le Other inorganic semiconductors
61.72.U- Doping and impurity implantation
68.55.-a Thin film structure and morphology

Capacitance–voltage characterization of silicide–GaAs Schottky contacts

T. N. Jackson and J. F. DeGelormo

J. Vac. Sci. Technol. B 3, 1676 (1985); http://dx.doi.org/10.1116/1.582960 (4 pages) | Cited 4 times

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Capacitance–voltage carrier concentration profiling has been used to investigate the high temperature stability of refractory metal silicide films on GaAs. This technique is more sensitive to silicide–semiconductor interactions than is forward I–V characterization since tenacious surface Fermi level pinning of GaAs can yield stable diode barrier height and ideality factor measurements even for some cases of gross silicide–semiconductor interaction. Using C–V characterization we have found tungsten silicide film compositions that exhibit excellent high temperature stability on GaAs and have suggested failure mechanisms for other less stable film compositions.
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68.60.-p Physical properties of thin films, nonelectronic
73.40.Lq Other semiconductor-to-semiconductor contacts, p-n junctions, and heterojunctions

Refractory metal silicides for self‐aligned gate modulation doped n+‐(Al,Ga)As/GaAs field‐effect transistor integrated circuits

N. C. Cirillo, H. K. Chung, P. J. Vold, M. K. Hibbs‐Brenner, and A. M. Fraasch

J. Vac. Sci. Technol. B 3, 1680 (1985); http://dx.doi.org/10.1116/1.582961 (5 pages) | Cited 8 times

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A refractory metal silicide process has been developed for the fabrication of self‐aligned gate (Al,Ga)As/GaAs FET’s (MODFET’s). Completely planar, self‐aligned gate by ion implantation MODFET’s have been fabricated and have demonstrated typical transconductances of 180–200 mS/mm at room temperature and over 300 mS/mm at 77 K. Self‐aligned gate ring oscillator test circuits have demonstrated gate propagation delays as low as 17.6 ps/gate at 2.65 mW/gate at room temperature.
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85.30.Tv Field effect devices
73.40.Lq Other semiconductor-to-semiconductor contacts, p-n junctions, and heterojunctions
85.40.Bh Computer-aided design of microcircuits; layout and modeling

A pure metal polycide metal‐oxide‐semiconductor gate technology

Keizo Sakiyama, Yoshimitsu Yamauchi, and Kenzo Matsuda

J. Vac. Sci. Technol. B 3, 1685 (1985); http://dx.doi.org/10.1116/1.582962 (7 pages) | Cited 2 times

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A pure metal (molybdenum) polycide MOS gate with a trilevel gate structure (Mo/thin MoSix/polysilicon) has been studied and different MoSix thicknesses ranging from 0 to 40 nm were examined. Even at high temperatures there is no interfacial reaction between the Mo and polysilicon nor any deterioration of the dielectric strength of MOS capacitors when this trilevel gate structure is used with an inter‐MoSix layer thickness of around 15 nm. This MOS structure offers stable MOS characteristics and low resistive molybdenum interconnections in VLSI process technology.
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73.40.Qv Metal-insulator-semiconductor structures (including semiconductor-to-insulator)

Compound sputtering cathodes of refractory metal silicides and thin film produced

Hung‐Lee Hoo and Jonathan B. Avins

J. Vac. Sci. Technol. B 3, 1692 (1985); http://dx.doi.org/10.1116/1.582963 (4 pages) | Cited 2 times

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Purity, density, and homogeneity results from manufacturing processes used to produce Ti, Mo, Ta, and W silicide sputtering cathodes have been evaluated in the light of sputtering characteristics. Resulting thin film properties of sheet resistivity, stoichiometry, and homogeneity were also determined. Metallographic studies of cathode materials are presented, along with sputtering parameters for planar silicide cathodes and film annealing conditions.
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81.15.Cd Deposition by sputtering
68.55.-a Thin film structure and morphology
68.60.-p Physical properties of thin films, nonelectronic
73.61.Cw Elemental semiconductors
73.61.Ey III-V semiconductors
73.61.Ga II-VI semiconductors
73.61.Jc Amorphous semiconductors; glasses
73.61.Le Other inorganic semiconductors

High‐power sputter deposition of tantalum silicide films from a composite target

C. G. Sridhar, R. Chow, R. A. Powell, and D. E. Stellrecht

J. Vac. Sci. Technol. B 3, 1696 (1985); http://dx.doi.org/10.1116/1.582938 (6 pages) | Cited 1 time

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Thin films of tantalum silicide were sputter deposited from a cold‐pressed, vacuum‐sintered target in a Varian 3180 system onto Si(100) wafers. Currently, the deposition of tantalum silicide from cold‐pressed, vacuum‐sintered targets is performed at relatively low powers of about 1 kW. Although the use of higher deposition power is of great practical interest to obtain increased deposition rates and wafer throughput, the effect on film properties must be determined. In this paper, films deposited at powers as high as ∼3 kW were characterized. The films were annealed in a Varian IA‐200 rapid isothermal annealer. In many cases, analytical measurements such as stoichiometry, stress, microstructure, and morphology were performed before and after annealing. Small variations of film properties were observed when the deposition was done on a heated substrate or on a substrate with negative dc bias voltage applied. It will be shown here that low‐resistivity (60–70 μΩ cm) film of tantalum silicide can be deposited from a cold‐pressed, vacuum‐sintered target at much higher than usual deposition power without affecting the film characteristics significantly.
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81.15.Cd Deposition by sputtering
73.61.Cw Elemental semiconductors
73.61.Ey III-V semiconductors
73.61.Ga II-VI semiconductors
73.61.Jc Amorphous semiconductors; glasses
73.61.Le Other inorganic semiconductors
68.55.-a Thin film structure and morphology
68.60.-p Physical properties of thin films, nonelectronic

Properties and structure of coevaporated NbSi2

Wu Guoying, Zhang Guobing, Wang Yang Yuan, Xu Wei, Li Yong Hong, C. G. Hopkins, and M. D. Strathman

J. Vac. Sci. Technol. B 3, 1702 (1985); http://dx.doi.org/10.1116/1.582939 (5 pages) | Cited 2 times

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This paper will investigate the properties and structure of coevaporated NbSi2 under a variety of annealing times and temperatures. Data from transmission electron microscopy (TEM) in situ vacuum annealing, conventional furnace annealing, and infrared rapid thermal annealing will be presented. The temperatures in this study ranged from room temperature to 950 °C for these annealing techniques. The results obtained in this work will be contrasted to those obtained for other interconnect materials such as polysilicon and refractory metal silicides.
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73.61.Cw Elemental semiconductors
73.61.Ey III-V semiconductors
73.61.Ga II-VI semiconductors
73.61.Jc Amorphous semiconductors; glasses
73.61.Le Other inorganic semiconductors
68.55.-a Thin film structure and morphology
81.40.Ef Cold working, work hardening; annealing, post-deformation annealing, quenching, tempering recovery, and crystallization
81.40.Rs Electrical and magnetic properties related to treatment conditions

Structure and properties of rapidly thermal annealed Ta/Si multilayers

Menachem Natan and Steven C. Shatas

J. Vac. Sci. Technol. B 3, 1707 (1985); http://dx.doi.org/10.1116/1.582940 (8 pages) | Cited 2 times

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The microstructure, chemistry, and phases in thin Ta/Si multilayers of various stoichiometry reacted by rapid thermal annealing (RTA) were investigated with cross‐sectional transmission electron microscopy (X‐TEM), Auger electron spectroscopy (AES), and glancing angle x‐ray diffraction (XRD). The nucleation and growth processes of TaSi2, the only silicide formed, are illustrated and discussed. The growth kinetics are affected by contamination. In contrast to reactions between Ta films and crystalline Si substrates where Si is diffusing and Ta is stationary, both species appear to be diffusing in thin amorphous multilayers. A thin Ta oxide forms on the surface when the material in contact with the annealing atmosphere (0.999 99 Ar) is Ta, but not when it is Si or TaSi2. The resistivity is stoichiometry and temperature dependent, and is always higher in silicide‐on‐SiO2 than in polycide structures, indicating that polysilicon substrates shunt some of the current during measurement.
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68.55.-a Thin film structure and morphology
68.60.-p Physical properties of thin films, nonelectronic
82.65.+r Surface and interface chemistry; heterogeneous catalysis at surfaces
73.61.-r Electrical properties of specific thin films

Self‐aligned TiSi2 for bipolar applications

Y. Koh, F. Chien, and M. Vora

J. Vac. Sci. Technol. B 3, 1715 (1985); http://dx.doi.org/10.1116/1.582941 (10 pages) | Cited 8 times

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A noble self‐aligned process has been developed for bipolar very large‐scale integrated (VLSI) applications. The structure considered here is a polysilicon emitter system where diodes and resistors are fabricated within the poly‐Si layer and integrated into memory cell units with silicide interconnects. The process was designed to eliminate device degradation related to dopant segregation arising from high temperature cycles. The silicide reaction was studied by conventional furnace anneal in H2 and by rapid thermal anneal (RTA) in Ar and N2. The sintering ambient has a pronounced effect on the silicide growth and film texture. A tremendous improvement in process flexibility and reproducibility can be attained by using N2, which drastically retards the silicide growth. Auger electron spectroscopy (AES) and chemical data suggested that the Ti–N2 interaction is of physical nature. The dependence of TiSi2/poly‐Si contact resistance on the poly‐Si doping concentration was measured for As and B doses of 1.0×1014–1.5×1016/cm2. Dopant redistribution during RTA and its effect on the contact resistance were investigated. A model is proposed to explain the observed variation of contact resistance with short time anneal cycles.
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85.40.Bh Computer-aided design of microcircuits; layout and modeling
85.30.De Semiconductor-device characterization, design, and modeling
73.40.Cg Contact resistance, contact potential
73.40.Lq Other semiconductor-to-semiconductor contacts, p-n junctions, and heterojunctions
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