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Jul 2012

Volume 30, Issue 4 (partial)

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Die singulation technologies for advanced packaging: A critical review

Wei-Sheng Lei, Ajay Kumar, and Rao Yalamanchili

J. Vac. Sci. Technol. B 30, 040801 (2012); http://dx.doi.org/10.1116/1.3700230 (27 pages)

Online Publication Date: 6 April 2012

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Die singulation, also known as wafer dicing, is reviewed in terms of the brief history, critical challenges, characterization of singulation quality, different singulation technologies and underlying mechanisms, and post-singulation die strength enhancement. Mechanical blade dicing has been the workhorse of die separation in the semiconductor manufacturing process. It faces growing challenges due to the adoption of copper/low-k dielectric interconnect structures, thin and ultra-thin wafers, die attach films, narrow dicing streets, and complex stacked structures on the dicing streets. Key dicing quality characteristics are chipping, delamination, kerf geometry, die side wall damage, die surface contamination, and die strength degradation. Various die singulation technologies have been developed to address these challenges and quality issues, including dicing by thinning, laser based approaches, laser and mechanical hybrid method, and plasma dicing. Die strength is a critical parameter for thin and ultra-thin dies. Post-dicing die strength enhancement is becoming the complement of most dicing technologies to achieve dies with high fracture strength. Plasma dicing has the potential to achieve much higher die strengths than all the other dicing approaches.
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85.40.-e Microelectronics: LSI, VLSI, ULSI; integrated circuit fabrication technology
85.40.Ls Metallization, contacts, interconnects; device isolation
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Passivation of interfacial defects at III-V oxide interfaces

Liang Lin and John Robertson

J. Vac. Sci. Technol. B 30, 04E101 (2012); http://dx.doi.org/10.1116/1.4710513 (14 pages)

Online Publication Date: 2 May 2012

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The electronic structure of gap states has been calculated in order to assign the interface states observed at III-V oxide interfaces. It is found that As-As dimers and Ga and As dangling bonds can give rise to gap states. The difficulty of passivating interface gap states in III-V oxide interfaces is attributed to an auto-compensation process of defect creation which is activated when an electron counting rule is not satisfied. It is pointed out that oxide deposition needs to avoid burying As dimer states from the free surface, and to avoid sub-surface oxidation during growth or annealing, in order to avoid defect states at the interface or in the subsurface semiconductor.
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81.65.Rv Passivation
61.72.Cc Kinetics of defect formation and annealing
71.20.Nr Semiconductor compounds
71.55.-i Impurity and defect levels
73.20.At Surface states, band structure, electron density of states

Formation of graphene on SiC(000math) surfaces in disilane and neon environments

Guowei He, Nishtha Srivastava, and Randall M. Feenstra

J. Vac. Sci. Technol. B 30, 04E102 (2012); http://dx.doi.org/10.1116/1.4718365 (6 pages)

Online Publication Date: 15 May 2012

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The formation of graphene on the SiC(000math) surface (the C-face of the {0001} surfaces) has been studied, utilizing both disilane and neon environments. In both cases, the interface between the graphene and the SiC is found to be different than for graphene formation in vacuum. A complex low-energy electron diffraction pattern with √43 × √43-R ± 7.6° symmetry is found to form at the interface. An interface layer consisting essentially of graphene is observed, and it is argued that the manner in which this layer covalently bonds to the underlying SiC produces the √43 × √43-R ± 7.6° structure [i.e., analogous to the 6√3 × 6√3-R30° “buffer layer” that forms on the SiC(0001) surface (the Si-face)]. Oxidation of the surface is found to modify (eliminate) the √43 × √43-R ± 7.6° structure, which is interpreted in the same manner as the known “decoupling” that occurs for the Si-face buffer layer.
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81.20.-n Methods of materials synthesis and materials processing
81.65.Mq Oxidation
61.48.Gh Structure of graphene
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