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Jan 2013

Volume 31, Issue 1, Articles (01xxxx)

Issue Cover Spotlight Figure

J. Vac. Sci. Technol. B 31, 010601 (2013); http://dx.doi.org/10.1116/1.4769732 (3 pages)

Scott Newman, Chad Gallinat, Jonathan Wright, Ryan Enck, Anand Sampath, Hongen Shen, Meredith Reed, and Michael Wraback
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Wavelength stable, p-side-down green light emitting diodes grown by molecular beam epitaxy

Scott Newman, Chad Gallinat, Jonathan Wright, Ryan Enck, Anand Sampath, Hongen Shen, Meredith Reed, and Michael Wraback

J. Vac. Sci. Technol. B 31, 010601 (2013); http://dx.doi.org/10.1116/1.4769732 (3 pages) | Cited 1 time

Online Publication Date: 5 December 2012

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p-side-down, single heterostructure n-InGaN/p-GaN light emitting diodes grown by molecular beam epitaxy exhibited stable peak emission wavelengths as long as 550 nm for current densities in excess of 100 A/cm2, and minimal efficiency droop up to 150 A/cm2 without the use of an electron blocking layer. This behavior is consistent with the formation of a two-dimensional hole gas in the n-InGaN layer and a higher barrier to electron overflow in the conduction band due to the negative polarization charge at the n-InGaN/p-GaN interface.
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85.60.Jb Light-emitting devices

Effect of oxygen plasma treatment on nonalloyed Al/Ti-based contact for high power InGaN/GaN vertical light-emitting diodes

Wantae Lim, Youngkyu Sung, Sung-Joon Kim, Young-Chul Shin, Tae-Sung Jang, Tae-Young Park, Gi-Bum Kim, Sang-Yeob Song, Wan-Ho Lee, Yong-Il Kim, Sung-Tae Kim, and Stephen J. Pearton

J. Vac. Sci. Technol. B 31, 010602 (2013); http://dx.doi.org/10.1116/1.4773006 (4 pages)

Online Publication Date: 21 December 2012

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InGaN/GaN vertical light emitting diodes (LEDs) with argon (Ar) and oxygen (O2) plasma-treated nonalloyed Al/Ti electrodes were fabricated on sapphire substrates. At the operating current of 350 mA, the forward voltage (VF) for O2 plasma-treated Al/Ti-based devices with dimensions 1360 × 1360 μm2 was improved, whose value was comparable or lower to that of nonalloyed Cr/Au-based devices. The Al/Ti electrodes resulted in improvement in optical output power of LEDs due to their high reflectivity (typically 10%–15% higher based on our data) compared to LEDs with conventional Cr/Au-based electrodes. The x-ray photoelectron spectroscopy showed the increase in Ga-O peak intensity during O2 plasma treatment. These results demonstrate that O2 plasma-treated Al/Ti electrodes reduced the contact resistance by forming a thin conductive GaOxN1−x layer at n-GaN surface.
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85.60.Jb Light-emitting devices
84.32.Dd Connectors, relays, and switches

Chemical kinetics of the hydrogen-GePb1 defect interaction at the (100)GexSi1−x/SiO2 interface

Nguyen Hoang Thoan, Andre Stesmans, Anh Phuc Duc Nguyen, Koen Keunen, and Valery V. Afanas'ev

J. Vac. Sci. Technol. B 31, 010603 (2013); http://dx.doi.org/10.1116/1.4773000 (5 pages)

Online Publication Date: 4 January 2013

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A study of the hydrogen passivation/dissociation kinetics of the GePb1 (Ge dangling bond) defect at the (100) GexSi1−x/SiO2 interface shows that the data can be well described by the same generalized simple thermal model as applied to the Si Pb dangling bond defect at the Si/SiO2 interface, enabling inference of the relevant kinetic parameters. It is found that even for optimized treatment, only ∼60% of the GePb1 system can be electrically inactivated through binding to H, which is well below device grade level. This is concluded to be a direct consequence of the existence of excessive spreads in activation energies for GePb1 passivation/reactivation dissociation.
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82.40.-g Chemical kinetics and reactions: special regimes and techniques
61.50.Lt Crystal binding; cohesive energy
81.65.Rv Passivation
82.30.Lp Decomposition reactions (pyrolysis, dissociation, and fragmentation)
82.37.-j Single molecule kinetics

Nanometer scale high-aspect-ratio trench etching at controllable angles using ballistic reactive ion etching

Shane A. Cybart, Peter Roediger, Erick Ulin-Avila, Stephen M. Wu, Travis J. Wong, and Robert C. Dynes

J. Vac. Sci. Technol. B 31, 010604 (2013); http://dx.doi.org/10.1116/1.4773919 (4 pages)

Online Publication Date: 7 January 2013

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The authors demonstrate a low pressure reactive ion etching process capable of patterning nanometer scale angled sidewalls and three dimensional structures in photoresist. At low pressure, the plasma has a large dark space region where the etchant ions have very large highly directional mean free paths. Mounting the sample entirely within this dark space allows for etching at angles relative to the cathode with minimal undercutting, resulting in high-aspect ratio nanometer scale angled features. By reversing the initial angle and performing a second etch, the authors create three-dimensional mask profiles.
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81.65.Cf Surface cleaning, etching, patterning
85.40.Hp Lithography, masks and pattern transfer
73.23.Ad Ballistic transport
73.50.Fq High-field and nonlinear effects
81.16.Nd Micro- and nanolithography
81.16.Rf Micro- and nanoscale pattern formation
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Atomic-scale silicon etching control using pulsed Cl2 plasma

Camille Petit-Etienne, Maxime Darnon, Paul Bodart, Marc Fouchier, Gilles Cunge, Erwine Pargon, Laurent Vallier, Olivier Joubert, and Samer Banna

J. Vac. Sci. Technol. B 31, 011201 (2013); http://dx.doi.org/10.1116/1.4768717 (8 pages)

Online Publication Date: 27 November 2012

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Plasma etching has been a key driver of miniaturization technologies toward smaller and more powerful devices in the semiconductor industry. Thin layers involved in complex stacks of materials are approaching the atomic level. Furthermore, new categories of devices have complex architectures, leading to new challenges in terms of plasma etching. New plasma processes that are capable to etch ultra-thin layers of materials with control at the atomic level are now required. In this paper, the authors demonstrate that Si etching in Cl2 plasma using plasma pulsing is a promising way to decrease the plasma-induced damage of materials. A controlled etch rate of 0.2 nm min−1 is reported by pulsing the chlorine plasma at very low duty cycles. Using quasi-in-situ angle resolved XPS analyses, they show that the surface of crystalline silicon is less chlorinated, the amorphization of the top crystalline silicon surface is decreased, and the chamber wall are less sputtered in pulsed plasmas compared to continuous wave plasmas. This is attributed to the lower density of radicals, lower ion flux, and lower V-UV flux when the plasma is pulsed.
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81.65.Cf Surface cleaning, etching, patterning
52.77.Bn Etching and cleaning
81.05.Cy Elemental semiconductors
79.60.Bm Clean metal, semiconductor, and insulator surfaces
82.80.Pv Electron spectroscopy (X-ray photoelectron (XPS), Auger electron spectroscopy (AES), etc.)
68.35.B- Structure of clean surfaces (and surface reconstruction)

Performance comparison of front- and back-illuminated AlGaN-based metal–semiconductor–metal solar-blind ultraviolet photodetectors

Guosheng Wang, Feng Xie, Hai Lu, Dunjun Chen, Rong Zhang, Youdou Zheng, Liang Li, and Jianjun Zhou

J. Vac. Sci. Technol. B 31, 011202 (2013); http://dx.doi.org/10.1116/1.4769250 (4 pages) | Cited 1 time

Online Publication Date: 30 November 2012

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In this work, AlGaN-based metal–semiconductor–metal solar-blind ultraviolet photodetectors (PDs) with low dark current were fabricated on sapphire substrates. In both front- and back-illumination operation modes, the PDs exhibited sharp photoresponse cutoffs at ∼280 nm with solar-blind/ultraviolet rejection ratios of more than 103. The quantum efficiency of the back-illuminated PD was observed to generally be higher than that of the front-illuminated PD. Nevertheless, at very low bias range, the front-illuminated PD exhibited greater photoresponsivity. The observed performance differences of the PDs in the different illumination modes are discussed in terms of surface reflectivity and photocarrier collection efficiency.
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85.60.Gz Photodetectors (including infrared and CCD detectors)
73.40.Sx Metal-semiconductor-metal structures

Effect of Ga2O3 sputtering power on breakdown voltage of AlGaN/GaN high-electron-mobility transistors

Ogyun Seok, Woojin Ahn, Min-Koo Han, and Min-Woo Ha

J. Vac. Sci. Technol. B 31, 011203 (2013); http://dx.doi.org/10.1116/1.4769863 (4 pages)

Online Publication Date: 30 November 2012

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RF-sputtered Ga2O3 passivation was used to fabricate AlGaN/GaN high-electron-mobility transistors (HEMTs) with high breakdown voltage (VBR). The authors varied RF-sputtering power from 50 to 200 W to optimize the HEMTs' blocking characteristics, such as VBR and leakage current. When a gate-source voltage (VGS) of −10 V and drain-source voltage (VDS) of 100 V were applied, 10-nm-thick Ga2O3-passivated HEMTs exhibited drain leakage currents of 63 nA/mm, 237 nA/mm, 1.7 μA/mm, and 181 μA/mm when sputtered at 50, 100, 150, and 200 W, respectively, compared with 52 μA/mm for an unpassivated HEMT. Ga2O3-passivated HEMTs with gate-drain distances (LGD) of 20 μm sputtered at 50, 100, 150, and 200 W exhibited VBR values of 1430, 890, 820, and 460 V, respectively, compared to 520 V for the unpassivated HEMT. VBR was decreased when the Ga2O3 passivation layer was deposited at a high sputtering power because of considerable sputtering damage to the AlGaN/GaN heterostructure. Also, VBR of the HEMTs that were Ga2O3-passivated at a low sputtering power increased linearly with LGD because electrons injected into the unintentionally formed vacancies in the Ga2O3 passivation layer effectively extended the depletion region between the gate and drain. The authors achieved a high VBR exceeding 2700 V at a sputtering power of 50 W and LGD of 40 μm.
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85.30.Tv Field effect devices
85.40.Sz Deposition technology
81.65.Rv Passivation

Enhanced electrical performance of Ag–Cu thin films after low temperature microwave processing

Sayantan Das, Rajitha N. P. Vemuri, and T. L. Alford

J. Vac. Sci. Technol. B 31, 011204 (2013); http://dx.doi.org/10.1116/1.4769964 (6 pages)

Online Publication Date: 5 December 2012

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In the present study, thin films of binary Ag–Cu alloys with different Cu content were prepared by a cosputtering technique and then annealed by microwave heating. The metallographic and electrical properties of the thin films were observed experimentally. It was found that the electrical performance of Ag–Cu thin films enhanced after microwave processing when compared to vacuum annealing. Based on the fact that Cu has a low solubility in Ag, it was chosen as the alloying element. The low solubility favored segregation of Cu at the surface and grain boundaries. This prevented Ag grain boundary diffusion and agglomeration. The as-deposited thin films were more resistive when compared to the microwave processed films. Comparison of the two postdeposition annealing techniques, microwave and vacuum, showed that microwave annealing is a clean, faster, and efficient process that can improve the electrical performance of Ag–Cu thin films. Results from this investigation demonstrated that microwave annealing is a suitable replacement of more expensive manufacturing techniques currently used in the field of interconnects technology.
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81.05.Bx Metals, semimetals, and alloys
81.15.Cd Deposition by sputtering
81.40.Gh Other heat and thermomechanical treatments
61.72.Mm Grain and twin boundaries
68.35.Dv Composition, segregation; defects and impurities
73.61.At Metal and metallic alloys

Ultra-compact, high-yield intra-cavity contacts for GaAs/AlGaAs-based vertical-cavity surface-emitting lasers

Chin-Han Lin, Brian J. Thibeault, Yan Zheng, Mark J. W. Rodwell, Larry A. Coldren, Alok Mehta, and Anis Husain

J. Vac. Sci. Technol. B 31, 011205 (2013); http://dx.doi.org/10.1116/1.4769856 (6 pages)

Online Publication Date: 11 December 2012

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A novel method of fabricating compact intra-cavity contacts with high yield for GaAs/AlGaAs-based vertical-cavity surface-emitting lasers is presented. By carefully tailoring the composition of high-aluminum content layer, a highly selective Al2O3 etch-stop layer can be formed simultaneously with the oxide aperture during wet thermal oxidation. With this technique, contact metals can be uniformly deposited on deeply embedded contact layers over large substrate areas. Utilizing this embedded etch-stop design, dual intra-cavity contacted three-terminal vertical-cavity surface-emitting lasers were fabricated, demonstrating submilliampere threshold currents, over 54% differential quantum efficiencies and over 9 mW output powers.
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42.55.Px Semiconductor lasers; laser diodes
42.60.By Design of specific laser systems
42.60.Da Resonators, cavities, amplifiers, arrays, and rings

Structural, morphological, and band alignment properties of GaAs/Ge/GaAs heterostructures on (100), (110), and (111)A GaAs substrates

Mantu K. Hudait, Yan Zhu, Nikhil Jain, and Jerry L. Hunter, Jr.

J. Vac. Sci. Technol. B 31, 011206 (2013); http://dx.doi.org/10.1116/1.4770070 (14 pages) | Cited 4 times

Online Publication Date: 12 December 2012

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Structural, morphological, and band offset properties of GaAs/Ge/GaAs heterostructures grown in situ on (100), (110), and (111)A GaAs substrates using two separate molecular beam epitaxy chambers, connected via vacuum transfer chamber, were investigated. Reflection high energy electron diffraction (RHEED) studies in all cases exhibited a streaky reconstructed surface pattern for Ge. Sharp RHEED patterns from the surface of GaAs on epitaxial Ge/(111)A GaAs and Ge/(110)GaAs demonstrated a superior interface quality than on Ge/(100)GaAs. Atomic force microscopy reveals smooth and uniform morphology with surface roughness of Ge about 0.2–0.3 nm. High-resolution triple axis x-ray rocking curves demonstrate a high-quality Ge epitaxial layer as well as GaAs/Ge/GaAs heterostructures by observing Pendellösung oscillations. Valence band offset, ΔEv, have been derived from x-ray photoelectron spectroscopy (XPS) data on GaAs/Ge/GaAs interfaces for three crystallographic orientations. The ΔEv values for epitaxial GaAs layers grown on Ge and Ge layers grown on (100), (110), and (111)A GaAs substrates are 0.23, 0.26, 0.31 eV (upper GaAs/Ge interface) and 0.42, 0.57, 0.61 eV (bottom Ge/GaAs interface), respectively. Using XPS data obtained from these heterostructures, variations in band discontinuities related to the crystallographic orientation have been observed and established a band offset relation of ΔEV(111)GaEV(110)>ΔEV(100)As in both upper and lower interfaces.
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73.40.Kp III-V semiconductor-to-semiconductor contacts, p-n junctions, and heterojunctions
79.60.Jv Interfaces; heterostructures; nanostructures
81.15.Hi Molecular, atomic, ion, and chemical beam epitaxy
68.55.ag Semiconductors

Impact of low-k structure and porosity on etch processes

Maxime Darnon, Nicolas Casiez, Thierry Chevolleau, Geraud Dubois, Willi Volksen, Théo J. Frot, Romain Hurand, Thibaut L. David, Nicolas Posseme, Névine Rochat, and Christophe Licitra

J. Vac. Sci. Technol. B 31, 011207 (2013); http://dx.doi.org/10.1116/1.4770505 (12 pages)

Online Publication Date: 12 December 2012

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The fabrication of interconnects in integrated circuits requires the use of porous low dielectric constant materials that are unfortunately very sensitive to plasma processes. In this paper, the authors investigate the etch mechanism in fluorocarbon-based plasmas of oxycarbosilane (OCS) copolymer films with varying porosity and dielectric constants. They show that the etch behavior does not depend on the material structure that is disrupted by the ion bombardment during the etch process. The smaller pore size and increased carbon content of the OCS copolymer films minimize plasma-induced damage and prevent the etch stop phenomenon. These superior mechanical properties make OCS copolymer films promising candidates for replacing current low-k dielectric materials in future generation devices.
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81.05.Lg Polymers and plastics; rubber; synthetic and natural fibers; organometallic and organic materials
81.05.Rm Porous materials; granular materials
81.65.Cf Surface cleaning, etching, patterning
77.55.Bh Low-permittivity dielectric films
61.41.+e Polymers, elastomers, and plastics
61.43.Gt Powders, porous materials

Kinetics of the deposition step in time multiplexed deep silicon etches

Iqbal R. Saraf, Matthew J. Goeckner, Brian E. Goodlin, Karen H. R. Kirmse, Caleb T. Nelson, and Lawrence J. Overzet

J. Vac. Sci. Technol. B 31, 011208 (2013); http://dx.doi.org/10.1116/1.4769873 (10 pages)

Online Publication Date: 13 December 2012

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The time multiplexed deep silicon etch (TMDSE) process is the etch process of choice to make MEMS devices and through wafer vias. It has been used to produce deep trenches and vias at reasonable throughputs. Significant issues remain for the TMDSE process as well as room for improvement even though it has been both experimentally studied and modeled by a wide variety of researchers. This is because it is a highly complex process. Aspect ratio dependencies, selectivity, and the ability to use photoresist masks (instead of SiO2) are examples of remaining issues. The presently obtainable etch rates do not indicate efficient use of the etchant species. In this article, the authors focus on the deposition step in the TMDSE process. While prior research has generally assumed that the deposition step can be adequately modeled as being controlled by a reactive sticking coefficient, they have experimentally examined the deposition step of the process and found that the film growth is dominantly ion-enhanced. The results shown here were obtained in C4F8 plasmas but are also consistent with results found in CHF3 and C4F6 plasmas. As a result, the deposited film thickness can be larger at the bottom of a high aspect ratio feature than at the top sidewall, which is exactly the opposite of the desired profile. The very nature of the deposition mechanism leads to mask undercut at the same time as feature closing/etch stop.
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81.65.Cf Surface cleaning, etching, patterning
07.10.Cm Micromechanical devices and systems

Crystallographic dependence of the lateral undercut wet etch rate of Al0.5In0.5P in diluted HCl for III–V sacrificial release

Thor Ansbæk, Elizaveta S. Semenova, Kresten Yvind, and Ole Hansen

J. Vac. Sci. Technol. B 31, 011209 (2013); http://dx.doi.org/10.1116/1.4771971 (4 pages)

Online Publication Date: 19 December 2012

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The authors investigated the use of InAlP as a sacrificial layer lattice-matched to GaAs when diluted hydrochloric acid is used for sacrificial etching. They show that InAlP can be used to fabricate submicrometer air gaps in micro-opto-electro-mechanical systems and that a selectivity toward GaAs larger than 500 is achieved. This selectivity enables fabrication control of the nanometer-size structures required in photonic crystal and high-index contrast subwavelength grating structures. The crystallographic dependence of the lateral etch rate in InAlP is shown to be symmetric around the 〈110〉 directions where an etch rate of 0.5 μm/min is obtained at 22 °C in HCl:2H2O. Since the etch rate in the 〈100〉 directions exceeds by ten times that of the 〈110〉 directions, InAlP may be used in sacrificial release of high-aspect ratio structures. Free-hanging structures with length to air-gap aspect ratios above 600 are demonstrated by use of critical point drying following the sacrificial etch.
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81.65.Cf Surface cleaning, etching, patterning
81.05.Ea III-V semiconductors
81.10.Aj Theory and models of crystal growth; physics and chemistry of crystal growth, crystal morphology, and orientation

Tungstate formation in a model scandate thermionic cathode

Congshang Wan and Martin E. Kordesch

J. Vac. Sci. Technol. B 31, 011210 (2013); http://dx.doi.org/10.1116/1.4772007 (11 pages)

Online Publication Date: 20 December 2012

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Crystalline compounds found at the surface of model Ba-Sc-O-W thermionic cathodes (“scandate”) are uniquely identified using Raman spectroscopy. Thin films of sputtered BaO and Sc2O3 on W have been observed in thermionic emission microscopy, field emission scanning electron microscopy, optical microscopy, and Raman Spectroscopy. While the best thermionic electron emission is observed from areas that at the end of the cathode life are completely devoid of thin film BaO, Sc2O3 or observable bulk oxide or tungstate material, the poor emission areas are characterized by BaWO4, Ba2WO5 and long chain linear tungstates (νas = 860 cm−1) that are related to Scx-WOy components. There is no evidence from Raman spectroscopy that tetrahedral Sc2(WO4)3 is present or forms on the surface of the model cathode, or for the presence of Ba3WO6.
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84.47.+w Vacuum tubes
68.55.A- Nucleation and growth
78.30.Hv Other nonmetallic inorganics
81.15.Cd Deposition by sputtering
79.40.+z Thermionic emission

Deep centers and persistent photocapacitance in AlGaN/GaN high electron mobility transistor structures grown on Si substrates

Alexander Y. Polyakov, N. B. Smirnov, A. V. Govorkov, E. A. Kozhukhova, Stephen J. Pearton, Fan Ren, Lu Lui, J. Wayne Johnson, N. I. Kargin, and R. V. Ryzhuk

J. Vac. Sci. Technol. B 31, 011211 (2013); http://dx.doi.org/10.1116/1.4773057 (5 pages) | Cited 2 times

Online Publication Date: 26 December 2012

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Deep trap spectra in AlGaN/GaN high electron mobility transistor structures grown on Si by metalorganic chemical vapor deposition show four major electron traps (Ec—0.15, 0.29, 0.40 and 0.76 eV) in the AlGaN barrier/interface region and three (Ec—0.18, 0.27 and 0.45 eV) in the undoped GaN buffer region. The presence of a high density of deep acceptor traps was observed in the AlGaN barrier region, as determined by hysteresis in low temperature capacitance-voltage (C-V) characteristics. The spectral dependence of persistent photocapacitance shifts showed two optical thresholds of 1.5 V and 3.1 eV, with the second being specific to structures grown on Si substrates. Comparison of results obtained on transistors and on large-area Schottky diodes prepared on heterostructures from which transistors are fabricated show that measurements on test large-area diodes are representative of the main characteristics important for transistor performance.
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85.30.Tv Field effect devices
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Ultraviolet curable branched siloxanes as low-k dielectrics for imprint lithography

Tsuyoshi Ogawa, Satoshi Takei, and C. Grant Willson

J. Vac. Sci. Technol. B 31, 011601 (2013); http://dx.doi.org/10.1116/1.4770051 (6 pages)

Online Publication Date: 5 December 2012

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A methacrylate-based, UV curable branched siloxane (MA-Si-12) was designed for use as a low-k dielectric that can be directly patterned by step and flash imprint lithography. MA-Si-12 has the properties of low viscosity (20 cP) and low vapor pressure (1.3 Torr), which make the material suitable for imprint processes based on an inkjet dispensing system. However, the mechanical strength of UV cured MA-Si-12 is too low (0.4 GPa Young's modulus by nanoindentation) for use with chemical mechanical polishing. Therefore, a methacrylate-based, UV curable cyclic siloxane (8-ring) was synthesized to be blended with the siloxane and improve the modulus. A formulation consisting of a mixture of MA-Si-12 and 8-ring (50 wt. % respectively) provides patterned structures with a modulus of 2.0 GPa. This formulation still has a viscosity (19 cP) and vapor pressure (1.3 Torr) low enough for inkjet dispensing. The UV cured resin has a dielectric constant of 2.8 at 1 MHz, low water absorption (0.7 wt. % after 24 h), and low UV cure shrinkage (5.6%). It provides high resolution, high fidelity imprint patterns. Mixing or blending of branched and cyclic siloxanes is a valuable approach to the design of imprint resist formulations with low dielectric constants.
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81.05.Lg Polymers and plastics; rubber; synthetic and natural fibers; organometallic and organic materials
81.40.Jj Elasticity and anelasticity, stress-strain relations
81.40.Np Fatigue, corrosion fatigue, embrittlement, cracking, fracture, and failure
62.20.de Elastic moduli
62.20.me Fatigue
77.22.Ch Permittivity (dielectric function)

Analysis and optimization approaches for wide-viewing-angle λ/4 plate in polarimetry for immersion lithography

Juan Dong and Yanqiu Li

J. Vac. Sci. Technol. B 31, 011602 (2013); http://dx.doi.org/10.1116/1.4769978 (7 pages)

Online Publication Date: 7 December 2012

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A waveplate is usually used to measure the polarization effects in optical systems. For a hyper numerical aperture imaging system with a large angle of incidence, the incident plane of light concerned may be neither parallel nor perpendicular to the optical axis of the waveplate, which makes a conventional waveplate produce undesired nonuniform retardation in any incident plane determined by the incident light and the wave normal of the crystal surface. To compensate effectively for this nonuniform retardation, the authors propose approaches to analyze and optimize the wide-viewing-angle (WVA) λ/4 plate. First, the retardation between the p and s components of a light wave propagating through the WVA waveplate is analyzed based on light propagation theory. Then, the authors develop an optimization method for the thickness parameters of the waveplates that compose the WVA λ/4 plate, which is used extensively in polarimetry for immersion lithography. It is found that the proposed approach is effective for WVA λ/4 plate design. The best WVA λ/4 plate has a small variation in retardation of less than ±0.5° for angles of incidence between ±20°.
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07.60.Fs Polarimeters and ellipsometers
42.15.Eq Optical system design
02.60.-x Numerical approximation and analysis
02.60.Pn Numerical optimization

Plasma-assisted cleaning by metastable-atom neutralization

Wayne M. Lytle, Daniel Andruczyk, and David N. Ruzic

J. Vac. Sci. Technol. B 31, 011603 (2013); http://dx.doi.org/10.1116/1.4770500 (9 pages)

Online Publication Date: 26 December 2012

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Plasma-assisted cleaning by metastable atomic neutralization (PACMAN) is a process that can clean hydrocarbon from extreme ultraviolet photo masks and dissolve hydrocarbon particles. It was developed with semiconductor manufacturing and cleaning in mind. The PACMAN process works by utilizing helium metastable atoms to break apart the contamination to be cleaned. As helium metastables interact with the contaminant surface, bonding electrons from the surface are “stolen” by the metastable helium resulting in “holes” where a bonding electron used to be. In this way, the structure of the contamination is compromised and allows for the removal either through desorption of CxHy molecules or by chain scission of the hydrocarbon backbone. A model of the helium metastable density within the processing chamber has been developed in addition to experimental measurements of the metastable density at the sample surface. Cleaning efficiency has been linked to both helium metastable density as well as electric field in the plasma sheath. Electric field calculations in the plasma sheath reveal that an electric field pointing into the plasma is needed for achieving high cleaning rates of hydrocarbons since it pins the holes that are created to the surface and stops the hydrocarbon bonds from re-forming. Operating the PACMAN process in this fashion allows for cleaning rates of approximately 1.2 × 107 ± 5.1 × 105 nm3/min from a particle without causing damage to the surrounding structure of the sample being cleaned. Carbon contamination in the form of carbon films on lithographic material has been shown to clean at rates of approximately 11.4 ± 0.3 nm/min.
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81.65.Cf Surface cleaning, etching, patterning
68.43.Nr Desorption kinetics
52.40.Kh Plasma sheaths
52.77.Bn Etching and cleaning

Metal contact printing photolithography for fabrication of submicrometer patterned sapphire substrates for light-emitting diodes

Yi-Ta Hsieh and Yung-Chun Lee

J. Vac. Sci. Technol. B 31, 011604 (2013); http://dx.doi.org/10.1116/1.4774061 (5 pages)

Online Publication Date: 7 January 2013

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This paper reports an improved method that combines a metal film contact printing method with traditional photolithography for fabrication of submicrometer-scale patterned sapphire substrates (PSSs) used for high-brightness light-emitting diodes (LEDs). First, a patterned metal thin film is transferred from the surface of a mold onto a photoresist (PR) layer deposited on top of the sapphire substrate. The transferred metal pattern acts as a photomask for subsequent photolithographic processes. PR structures with a high aspect ratio of 5 and a small line width of 500 nm are fabricated on 2 and 4 in. sapphire wafers. Finally, inductively coupled plasma etching is performed on the sapphire substrates to obtain PSSs by using the patterned PR microstructures as an etching mask. Experiments have been performed and both 2 and 4 in. PSSs with submicrometer-scaled and cone-shaped surface features were successfully obtained. These PSSs can be used in the LED industry to obtain high-brightness LEDs.
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68.55.at Other materials
52.77.Bn Etching and cleaning
81.16.Nd Micro- and nanolithography
81.16.Rf Micro- and nanoscale pattern formation
81.65.Cf Surface cleaning, etching, patterning

Influence of secondary electrons in high-energy electron beam lithography

Ananthan Raghunathan and John G. Hartley

J. Vac. Sci. Technol. B 31, 011605 (2013); http://dx.doi.org/10.1116/1.4774114 (5 pages)

Online Publication Date: 7 January 2013

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The effect of secondary electrons in electron beam lithography is investigated based on a technique called point exposure distribution measurements. This technique involves printing a series of dots at different exposure doses using a high contrast electron beam resist. The experimental results indicate that the secondary electrons are the most likely cause for exposure events. The secondary electrons generated due to forward scattering also limit the highest achievable resolution. An analytical model is developed here based on the physics governing secondary electron generation and transport. The model is able to predict the dependence of dose on the observed diameter to within a reasonable accuracy. The experimental results were verified with the model at both 100 and 50 keV.
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85.40.Hp Lithography, masks and pattern transfer
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Design and fabrication of a metallic nanostamp using UV nanoimprinting and electroforming for replicating discrete track media with feature size of 35 nm

Jiseok Lim, Hyun-guk Hong, Jungjin Han, Eikhyun Cho, Young-joo Kim, Hiroshi Hatano, and Norikazu Arai

J. Vac. Sci. Technol. B 31, 011801 (2013); http://dx.doi.org/10.1116/1.4768685 (7 pages)

Online Publication Date: 28 November 2012

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The demand for high-density data-storage media is increasing, necessitating the development of novel magnetic data-storage technologies. Among the various types of storage media, discrete track media (DTM) is an emerging technology that is being used to overcome the limitations of conventional continuous magnetic data-storage technology, such as the superparamagnetic effect and medium noise. In this study, the authors propose a method of fabricating a metallic stamp for replicating DTM patterns using ultraviolet (UV) nanoimprinting and electroforming, which are inexpensive processes that can be used to fabricate nanostructures with high precision. First, a silicon nanomaster with a feature size of 35 nm and a pitch of 70 nm was designed and fabricated by electron-beam recording and inductively coupled plasma etching. The measured pitch of the silicon master was 71.6 nm. Then, a polymeric master with a full track of nanoline patterns was then replicated from the silicon nanomaster via UV nanoimprinting. To improve the releasing properties during UV nanoimprinting, the silicon nanomaster was coated with a self-assembled monolayer of fluoroctatrichlorosilane. The measured average pitch and height of the replicated polymer master were 71.5 and 61 nm, respectively. Then, a metallic nanostamp with a thickness of 300 μm and a diameter of 80 mm was fabricated using electroforming. The metallic nanostamp was successfully fabricated, and its geometrical properties were measured and analyzed. The pitch and height of fabricated nickel stamp were 71.2 and 60.3 nm, respectively.
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81.16.Nd Micro- and nanolithography
81.16.Dn Self-assembly
85.70.Li Other magnetic recording and storage devices (including tapes, disks, and drums)
82.45.-h Electrochemistry and electrophoresis

Large-area fabrication of high aspect ratio tantalum photonic crystals for high-temperature selective emitters

Veronika Rinnerbauer, Sidy Ndao, Yi Xiang Yeng, Jay J. Senkevich, Klavs F. Jensen, John D. Joannopoulos, Marin Soljačić, Ivan Celanovic, and Robert D. Geil

J. Vac. Sci. Technol. B 31, 011802 (2013); http://dx.doi.org/10.1116/1.4771901 (7 pages) | Cited 1 time

Online Publication Date: 12 December 2012

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The authors present highly selective emitters based on two-dimensional tantalum (Ta) photonic crystals, fabricated on 2 in. polycrystalline Ta substrates, for high-temperature applications, e.g., thermophotovoltaic energy conversion. In this study, a fabrication route facilitating large-area photonic crystal fabrication with high fabrication uniformity and accuracy, based on interference lithography and reactive ion etching is discussed. A deep reactive ion etch process for Ta was developed using an SF6/C4F8 based Bosch process, which enabled us to achieve ∼ 8.5 μm deep cavities with an aspect ratio of ∼ 8, with very steep and smooth sidewalls. The thermal emitters fabricated by this method show excellent spectral selectivity, enhancement of the emissivity below cut-off approaching unity, and a sharp cut-off between the high emissivity region and the low emissivity region, while maintaining the low intrinsic emissivity of bare Ta above the cut-off wavelength. The experimental results show excellent agreement with numerical simulations.
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78.67.Pt Multilayers; superlattices; photonic structures; metamaterials
81.65.Cf Surface cleaning, etching, patterning
42.70.Qs Photonic bandgap materials

Nanoscale optical critical dimension measurement of a contact hole using deep ultraviolet spectroscopic ellipsometry

Houssam Chouaib and Qiang Zhao

J. Vac. Sci. Technol. B 31, 011803 (2013); http://dx.doi.org/10.1116/1.4771969 (6 pages)

Online Publication Date: 19 December 2012

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Highly sensitive optical metrology techniques based on spectroscopic ellipsometry (SE) are required for three dimensional monitoring of line-profiles and critical-dimension (CD) of advanced design-rule devices. In this paper, theoretical and SE-based experimental techniques are used to study elliptical contact holes (CH) in a SiO2 layer. These structures were chosen because measuring their shapes is made difficult by the low optical contrast between air inside the holes and SiO2, as well as the strong coupling between critical shape parameters. Results showed that moving from conventional ultraviolet SE to deep ultraviolet SE (DUVSE) was a key to breaking the correlation between top and bottom CD and obtaining an accurate and physically realistic CH profile. The DUVSE-based CD results were validated using a scanning electron microscope.
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81.07.Bc Nanocrystalline materials
61.46.-w Structure of nanoscale materials
78.40.Ha Other nonmetallic inorganics
07.78.+s Electron, positron, and ion microscopes; electron diffractometers
07.60.Fs Polarimeters and ellipsometers

Fabrication of indium tin oxide bump/pit structures on GaN-based light emitting diodes

Zhe Liu, Yujin Wang, Haifang Yang, Hongxing Yin, Baogang Quan, Xiaoxiang Xia, Wuxia Li, and Changzhi Gu

J. Vac. Sci. Technol. B 31, 011804 (2013); http://dx.doi.org/10.1116/1.4772462 (4 pages)

Online Publication Date: 19 December 2012

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In the past several decades, significant progress has been made to improve the performance of semiconducting light emitting diodes (LEDs), which has resulted in a wide number of applications for LEDs in the information and energy fields. However, light extraction efficiency is limited due to remarkable total internal reflection on the device's surface due to the large refractive index of GaN and indium tin oxides (ITO). In this work, ITO bump and pit patterns were fabricated on the LED surface using an ion beam etching method via metal or resist masks, respectively. By changing the incident angle of the ion beam and the material of the masks, the effects of faceting and redeposition can be properly controlled, resulting in well-controlled manipulation of the shape of the fabricated bump/pit structures. By altering the etching time, the over-etched structures have a much smoother surface compared with the under-etched/in-etched structures. These bump/pit structures could have potential applications in LED light emitting enhancement and optical devices.
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85.60.Jb Light-emitting devices
81.65.Cf Surface cleaning, etching, patterning
85.40.Hp Lithography, masks and pattern transfer

Effect of buffer structures on AlGaN/GaN high electron mobility transistor reliability

Lu Liu, Chien-Fong Lo, Yuyin Xi, Fan Ren, Stephen J. Pearton, Oleg Laboutin, Yu Cao, J. Wayne Johnson, and Ivan I. Kravchenko

J. Vac. Sci. Technol. B 31, 011805 (2013); http://dx.doi.org/10.1116/1.4773060 (6 pages)

Online Publication Date: 21 December 2012

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AlGaN/GaN high electron mobility transistors (HEMTs) with three different types of buffer layers, including a GaN/AlGaN composite layer, or 1 or 2 μm GaN thick layers, were fabricated and their reliability compared. The HEMTs with the thick GaN buffer layer showed the lowest critical voltage (Vcri) during off-state drain step-stress, but this was increased by around 50% and 100% for devices with the composite AlGaN/GaN buffer layers or thinner GaN buffers, respectively. The Voff - state for HEMTs with thin GaN and composite buffers were ∼100 V, however, this degraded to 50–60 V for devices with thick GaN buffers due to the difference in peak electric field near the gate edge. A similar trend was observed in the isolation breakdown voltage measurements, with the highest Viso achieved based on thin GaN or composite buffer designs (600–700 V), while a much smaller Viso of ∼200 V was measured on HEMTs with the thick GaN buffer layers. These results demonstrate the strong influence of buffer structure and defect density on AlGaN/GaN HEMT performance and reliability.
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85.30.Tv Field effect devices
85.75.Hh Spin polarized field effect transistors

Novel techniques for modifying microtube surfaces with various periodic structures ranging from nano to microscale

Zhaoqian Liu, Jinxing Li, Bingrui Lu, Yifang Chen, Ran Liu, Gaoshan Huang, and Yongfeng Mei

J. Vac. Sci. Technol. B 31, 011806 (2013); http://dx.doi.org/10.1116/1.4772769 (4 pages)

Online Publication Date: 4 January 2013

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Two dimensional (2-D) structured membranes have been well developed and widely studied to find potential applications in broad realms like optics, mechanics, fluidics, and electronics. In this work, the authors have successfully combined the top–down patterning techniques with the roll-up process to convert various structured flat membranes into three dimensional (3-D) microtubes with textured tube-walls. These 3-D textured microtubes may exhibit novel properties different from the original 2-D films and, thus, can be applied in wider research disciplines such as modern material sciences, biology, electrochemistry, etc. Depending on the parameters of the periodic templates including nanoscale porous anodic alumina and microscale imprinted templates in this work, the authors can curve these textured films into 3-D microtubes with structures on the tube-walls by the rolled-up nanotechnique. The specially designed microtubes here have the potential of interesting optical, electrical, and mechanical characteristics as well as possible applications in micro/nanoelectronics, optics, fludics, and bioengineering.
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81.65.-b Surface treatments
68.35.B- Structure of clean surfaces (and surface reconstruction)
68.55.jm Texture
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Comparison of CuPc-based organic thin-film transistors made by different dielectric structures

Wing Man Tang, Wai Tung Ng, Mark T. Greiner, Jacky Qiu, Michael G. Helander, and Zheng-Hong Lu

J. Vac. Sci. Technol. B 31, 012201 (2013); http://dx.doi.org/10.1116/1.4769259 (6 pages)

Online Publication Date: 3 December 2012

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Copper phthalocyanine-based organic thin-film transistors (OTFTs) with gate dielectric made by different combinations of ZrO2 and Al2O3 are fabricated. Experimental results show that as compared to the OTFTs with ZrO2/Al2O3 stacked and Al2O3/ZrO2/Al2O3 sandwiched gate dielectric, the device fabricated with the Al2O3/ZrO2 stacked gate dielectric manifests better electrical properties such as larger on/off ratio, smaller subthreshold slope, and higher carrier mobility. This could be explained by the fact that Al2O3 has good interface properties with CuPc and can act as a barrier layer, which prevents intermixing of materials at the organic/insulator interface and can slow oxygen diffusion through Al-O matrix, thus suppressing interfacial trap density. The gate-bias stress effect on the performance of OTFTs is also investigated. It is found that the threshold voltage shifts toward positive direction with stress time under a negative gate bias voltage. Longer stress times cause more degradation of the subthreshold and on/off ratio, probably due to more defect-state creation in the channel and an increase of interfacial traps and oxide charges in the dielectric during stress. Results also indicate that OTFTs with Al2O3 interlayer between the high-k dielectric and the gate electrode have less degradation in subthreshold and on/off ratio after a 3600-s stress. The involved mechanism lies in that the Al2O3 interlayer at the high-k dielectric/gate electrode interface can effectively block the injection of electrons from the gate electrode into the high-k material during electrical stress and thus less stress-induced interfacial traps and negative oxide charges in the devices. The electrical characteristics of the OTFTs after the removal of gate bias for a period of time are also studied.
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85.30.Tv Field effect devices

Crystal structure and epitaxial relationship of Ni4InGaAs2 films formed on InGaAs by annealing

Ivana, Yong Lim Foo, Xingui Zhang, Qian Zhou, Jisheng Pan, Eugene Kong, Man Hon Samuel Owen, and Yee-Chia Yeo

J. Vac. Sci. Technol. B 31, 012202 (2013); http://dx.doi.org/10.1116/1.4769266 (8 pages) | Cited 1 time

Online Publication Date: 3 December 2012

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The structural, compositional, and electrical properties of epitaxial Ni4InGaAs2 (denoted as Ni-InGaAs) film formed by annealing sputtered Ni film on InGaAs were investigated. It was found that Ni-InGaAs adopts a NiAs (B8) structure with lattice parameters of a = 0.396 ± 0.002 nm and c = 0.516 ± 0.002 nm, and exhibits an epitaxial relationship with InGaAs, with orientations given by Ni-InGaAs[math10]//InGaAs[001] and Ni-InGaAs[110]//InGaAs[110]. The epitaxial Ni4InGaAs2 film has bulk electrical resistivity of ∼102 μΩ·cm, which increases as the film thickness scales below 10 nm. The results of this work would be useful for the development of contact metallization for high mobility InGaAs metal-oxide-semiconductor field-effect transistors.
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73.61.Ey III-V semiconductors
81.15.Cd Deposition by sputtering
85.30.Tv Field effect devices
85.40.Ls Metallization, contacts, interconnects; device isolation
68.55.ag Semiconductors
61.72.Cc Kinetics of defect formation and annealing

Ion implantation synthesis and conduction of tantalum oxide resistive memory layers

Seann M. Bishop, Benjamin D. Briggs, Phillip Z. Rice, Jihan O. Capulong, Hassaram Bakhru, and Nathaniel C. Cady

J. Vac. Sci. Technol. B 31, 012203 (2013); http://dx.doi.org/10.1116/1.4771987 (8 pages)

Online Publication Date: 19 December 2012

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In this paper, the ion implantation synthesis of tantalum oxide resistive memory material is introduced, the salient switching properties are described, and the results from an analysis of the off- and on-state conduction are presented. The tantalum oxide layers were synthesized by oxygen ion implanting (5 × 1016/cm2 O+ ions at 30 keV) tantalum metal. From composition-depth profiling, the oxygen implant profile is estimated to peak at ∼20 at. %. The properties of memory devices fabricated from the implantation-synthesized oxide were investigated through endurance testing. A stable 2× memory window was obtained for >103 switching cycles with low SET and RESET voltages <|1|. Both the on- and off-state resistance decreased inversely with the current used during programming. Analyses of the current–voltage data show that the platinum-tantalum oxide Schottky barrier factors largely into the resistance difference between memory states. Lastly, defect-related conduction dominated the current of the off-state resistance at high voltages. At >2 V, Frenkel-Poole emission current was identified; thus, trap states that may be induced by the implantation process impact high voltage conduction in this memory state.
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61.72.up Other materials
84.30.Sk Pulse and digital circuits
72.20.Ht High-field and nonlinear effects

Characterization of carbon nanotube field emitters in pulsed operation mode

Daniela Leberl, Raghunandan Ummethala, Albrecht Leonhardt, Bernhard Hensel, Sandro F. Tedde, Oliver Schmidt, and Oliver Hayden

J. Vac. Sci. Technol. B 31, 012204 (2013); http://dx.doi.org/10.1116/1.4773058 (6 pages) | Cited 1 time

Online Publication Date: 21 December 2012

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Carbon nanotubes (CNTs) are promising candidates as electron sources for novel x-ray tubes. Short pulses, high emission currents, and long-term stability are prerequisites for practical applications in medical x-ray imaging. Here, the authors present field emission from CNTs in pulsed operation mode exhibiting very high stability for 200 cumulative hours and a maximum current of 126 mA corresponding to 202 mA/cm2 at an applied field of 9.3 V/μm. They investigated the correlation of classical emitter characteristics such as threshold field and field enhancement factor to the long-term stability and maximum emission current. This correlation was found to be rather poor. Instead, they observed a steady voltage increase for a fixed current during lifetime experiments. This observation allowed to derive a degradation parameter which determines the emitter quality for pulsed applications. Detailed investigations of the degradation in dependency of pressure, duty cycle, and pulse-on time were performed to predict the stability and lifetime of CNT-based field emitters.
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87.59.-e X-ray imaging
61.48.De Structure of carbon nanotubes, boron nanotubes, and other related systems
79.70.+q Field emission, ionization, evaporation, and desorption
84.47.+w Vacuum tubes

Benefits of plasma treatments on critical dimension control and line width roughness transfer during gate patterning

Laurent Azarnouche, Erwine Pargon, Kevin Menguelti, Marc Fouchier, Olivier Joubert, Pascal Gouraud, and Christophe Verove

J. Vac. Sci. Technol. B 31, 012205 (2013); http://dx.doi.org/10.1116/1.4773063 (11 pages) | Cited 1 time

Online Publication Date: 26 December 2012

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The present work focuses on the line width roughness (LWR) transfer and the critical dimension control during a typical gate stack patterning and shows the benefits of introducing 193 nm photoresist treatments before pattern transfer into the gate stack to improve process performance. The two investigated treatments (HBr plasma and vacuum ultra violet (VUV) plasma radiation) have been tested on both blanket photoresist films and resist patterns to highlight the etching and roughening mechanisms of cured resists. Both treatments reinforce the etch resistance of the photoresist exposed to fluorocarbon plasma etching process used to open the Si-ARC (silicon antireflective coating) layer. The etch resistance improvement of cured resists is attributed to both the decrease in oxygen content within the resist and the crosslinking phenomena caused by VUV radiation during the treatment. As the magnitude of the surface roughness is directly correlated to the etched thickness, cured resists, which are etched less rapidly, will develop a lower surface roughness for the same processing time compared to reference resists. The LWR evolution along the pattern sidewalls has been studied by critical dimension atomic force microscopy during the Si-ARC plasma etching step. The study shows that the LWR is degraded at the top of the resist pattern and propagates along the pattern sidewalls. However, as long as the degradation does not reach the interface between resist and Si-ARC, the LWR decreases during the Si-ARC etching step. As resist pretreatments reinforce the resist etch resistance during Si-ARC etching, the LWR degradation along the sidewalls is limited leading to minimized LWR transfer. The LWR decrease observed after plasma etching has been explained thanks to a spectral analysis of the LWR performed by critical dimension scanning electron microscopy combined with the power spectral density fitting method. The study shows that the high and medium frequency components of the roughness (periodicity below 200 nm) are not totally transferred during the gate patterning allowing a LWR decrease at each plasma step.
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81.16.Nd Micro- and nanolithography
81.16.Rf Micro- and nanoscale pattern formation
81.65.Cf Surface cleaning, etching, patterning
82.35.-x Polymers: properties; reactions; polymerization
68.35.B- Structure of clean surfaces (and surface reconstruction)
81.05.Cy Elemental semiconductors

Characteristics of metal–oxide–semiconductor field-effect transistors with a functional gate using trap charging for ultralow power operation

Takashi Kudo, Takashi Ito, and Anri Nakajima

J. Vac. Sci. Technol. B 31, 012206 (2013); http://dx.doi.org/10.1116/1.4773576 (7 pages)

Online Publication Date: 9 January 2013

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A functional gate metal–oxide–semiconductor field-effect transistor that enables self-adjustment of threshold voltage (Vth) was developed for the ultralow power operation. The operating principle enables the on-current to be increased without increasing the off-current. Prototype devices were fabricated with complementary metal–oxide–semiconductor (CMOS) fabrication technology using a silicon-on-insulator substrate, and the fundamental device characteristics necessary for ultralow power operation were demonstrated with an emphasis on the device reliability. A negative Vth shift was caused by electron ejection from the poly-Si charge trap layer, and a positive Vth shift was caused by electron injection from the top gate electrode. A fabricated device endured 105 electron ejection-and-injection cycles when only a positive bias Vg was applied. Endurance characteristics of the fabricated devices showed that the number of cycles to oxide breakdown increased as the channel size decreased. The authors explained the SiO2 breakdown mechanism by using a percolation model. They consider that scaling down of the channel size and the thickness of the tunnel gate oxide will open the way to the development of CMOS logic applications for this device.
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85.30.Tv Field effect devices
85.40.-e Microelectronics: LSI, VLSI, ULSI; integrated circuit fabrication technology

Tailoring the composition of lead zirconate titanate by atomic layer deposition

Ju H. Choi, Feng Zhang, Ya-Chuan Perng, and Jane P. Chang

J. Vac. Sci. Technol. B 31, 012207 (2013); http://dx.doi.org/10.1116/1.4775789 (7 pages)

Online Publication Date: 11 January 2013

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The incubation time during atomic layer deposition (ALD) of lead oxide, zirconium oxide, and titanium oxide on each other was quantified in order to precisely control the composition of lead zirconate titanate (PZT). The desired stoichiometry of Pb:Zr:Ti=2:1:1, which yields the desired ferroelectricity, was found to depend strongly on the ALD sequence, the substrate of choice, as well as the postdeposition annealing temperature. With the desired stoichiometry, the ferroelectric and piezoelectric properties of the PZT films were validated by polarization–voltage hysteresis loop and piezoresponse force microscopy, respectively, demonstrating that ALD method is a viable technique for ultra thin ferroelectric films for device applications.
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68.55.A- Nucleation and growth
77.84.Cg PZT ceramics and other titanates
77.55.hj PZT
77.80.Dj Domain structure; hysteresis
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
81.40.Ef Cold working, work hardening; annealing, post-deformation annealing, quenching, tempering recovery, and crystallization
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Modeling of top and bottom contact structure organic field effect transistors

Brijesh Kumar, Brajesh Kumar Kaushik, and Yuvraj Singh Negi

J. Vac. Sci. Technol. B 31, 012401 (2013); http://dx.doi.org/10.1116/1.4773054 (7 pages) | Cited 1 time

Online Publication Date: 26 December 2012

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This research paper proposes analytical models for top and bottom contact organic field effect transistors by considering the overlapping of source-drain (S/D) contacts on to the organic semiconductor layer and effective channel between the contacts. The contact effect is investigated in the proposed models and further verified through two-dimensional (2-D) numerical device simulation. The electrical characteristics are obtained from the linear to saturation regime and analytical outcomes are compared with the simulation and experimental results, which shows good agreement and thus validate the models. The extracted mobilities for top and bottom contact structure include 0.129 and 0.0019 cm2/Vs, and the device resistance as 2.25 and 450MΩ and the contact resistance as 2.25 and 450 MΩ μm2, respectively. The performance difference between top and bottom contact is attributed to the structural difference and morphological disorders of pentacene film around the contacts in bottom contact device which results in higher contact resistance and lower mobility as compared to the top contact device.
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85.30.Tv Field effect devices
84.32.Dd Connectors, relays, and switches
85.30.De Semiconductor-device characterization, design, and modeling
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Nanoporous gold—Application to extraordinary optical transmission of light

Denis Garoli, Gianluca Ruffato, Sandro Cattarin, Simona Barison, Mauro Perino, Tommaso Ongarello, and Filippo Romanato

J. Vac. Sci. Technol. B 31, 012601 (2013); http://dx.doi.org/10.1116/1.4769975 (6 pages)

Online Publication Date: 6 December 2012

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The authors present their work in the preparation of nanoporous gold layers and their patterning with an original procedure preserving the porosity, to obtain the phenomenon of extraordinary transmission of light with a porous material. The design, fabrication, and characterization of nanoslit arrays made with bulk gold and nanoporous gold films are presented and their sensing performances are compared after coating with thiolated organic molecules. Thanks to a greatly enhanced surface-to-volume ratio, nanoporous gold reveals benefits for better reaction efficiency and detection sensitivity. Moreover, plasmonic properties in the near-IR range assure employment in plasmonic devices.
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78.67.Rb Nanoporous materials
81.05.Rm Porous materials; granular materials
81.16.Rf Micro- and nanoscale pattern formation
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Flash sample heating for scanning tunneling microscopy: Desorption of 1-octanethiolate self-assembled monolayers in air

Matthew M. Jobbins, Christopher J. Agostino, Jolai D. Michel, Guido Caponigri-Guerra, Sean B. Nees, and S. Alex Kandel

J. Vac. Sci. Technol. B 31, 013201 (2013); http://dx.doi.org/10.1116/1.4769263 (3 pages)

Online Publication Date: 6 December 2012

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The authors have developed a method of performing scanning tunneling microscopy experiments with a sample that can be controllably heated and quickly cooled. Temperatures in excess of 100 °C are achievable, and the same scanning area can be imaged multiple times before and after repeated heating cycles. This opens up for study any physical process or chemical reaction where the reactants, products, and/or intermediates can be kinetically trapped on a conductive surface at room temperature. As a demonstration of this approach, the authors have investigated desorption from 1-octanethiolate self-assembled monolayers on Au(111).
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68.43.Nr Desorption kinetics
82.65.+r Surface and interface chemistry; heterogeneous catalysis at surfaces
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Charge trapping analysis of Al2O3 films deposited by atomic layer deposition using H2O or O3 as oxidant

Mireia Bargalló González, Joan Marc Rafí, Oihane Beldarrain, Miguel Zabala, and Francesca Campabadal

J. Vac. Sci. Technol. B 31, 01A101 (2013); http://dx.doi.org/10.1116/1.4766182 (6 pages) | Cited 1 time

Online Publication Date: 9 November 2012

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In this work, the authors focus on the charge trapping behavior of Al2O3 layers deposited by atomic layer deposition. The goal is to give an insight into the effects of the oxidant source (H2O or O3) and the postdeposition anneal on the charging phenomena and the generation of new defects during electrical stress. For this purpose, current–voltage, capacitance–voltage, and conductance–voltage characteristics of Al/Al2O3/p-Si capacitors are analyzed before and after constant voltage stress and several phenomena such as the generation of neutral traps in the bulk dielectric, slow states, interface states, and charge trapping related degradation during the electrical stress are investigated. Finally, the impact of the oxidant source on the Al2O3 layer reliability is discussed.
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73.61.Ng Insulators
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)
84.32.Tt Capacitors
85.30.Tv Field effect devices
61.72.Cc Kinetics of defect formation and annealing
73.50.Gr Charge carriers: generation, recombination, lifetime, trapping, mean free paths

Properties of stacked SrTiO3/Al2O3 metal–insulator–metal capacitors

Mindaugas Lukosius, Christian Wenger, Tom Blomberg, and Guenther Ruhl

J. Vac. Sci. Technol. B 31, 01A102 (2013); http://dx.doi.org/10.1116/1.4766183 (6 pages)

Online Publication Date: 27 November 2012

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The possibilities to grow thin films of SrTiO3 and Al2O3 by atomic layer deposition for stacked metal–insulator–metal capacitors have been investigated in this work. In order to tune the functional properties of the capacitors, different processing steps have been employed to realize different combinations of the dielectric stacks. Electrical properties, extracted after the postdeposition annealing and sputter deposition of the Au top electrodes, indicated that the metal–insulator–metal (MIM) structures with additional Al2O3 layer provided better leakage currents densities, compared to the ones with single SrTiO3 based MIM capacitors, but the dielectric constant values have also decreased if additional Al2O3 film was inserted. Attempts to optimize the properties of the MIM stacks have been done by manufacturing heterostructures of Al2O3/SrTiO3/Al2O3 as well as SrTiO3/Al2O3/SrTiO3. In the first case, Al2O3 prevented the crystallization of SrTiO3 in the multilayer dielectric structure and therefore reduced the total capacitance density of the particular MIM stack, whereas the SrTiO3/Al2O3/SrTiO3 stack was found to possess superior electrical properties. Leakage current density as low as ∼10−8 A/cm2 at 2 V and the dielectric constant value of 40 have been extracted.
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84.32.Tt Capacitors
85.30.Tv Field effect devices
73.40.Rw Metal-insulator-metal structures
81.15.Cd Deposition by sputtering

Optimization of gadolinium oxide growth deposited on Si by high pressure sputtering

Pedro Carlos Feijoo, María Ángela Pampillón, and Enrique San Andrés

J. Vac. Sci. Technol. B 31, 01A103 (2013); http://dx.doi.org/10.1116/1.4766184 (7 pages) | Cited 1 time

Online Publication Date: 27 November 2012

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High κ gadolinium oxide thin layers were deposited on silicon by high-pressure sputtering (HPS). In order to optimize the properties for microelectronics applications, different deposition conditions were used. Ti (scavenger) and Pt (nonreactive) were e-beam evaporated to fabricate metal–insulator–semiconductor (MIS) devices. According to x-ray diffraction, x-ray photoelectron spectroscopy, and Fourier-transform infrared spectroscopy, polycrystalline stoichiometric Gd2O3 films were obtained by HPS. The growth rate decreases when increasing the deposition pressure. For relatively thick films (40 nm), a SiOx interface as well as the formation of a silicate layer (GdSiOx) is observed. For thinner films, in Ti gated devices the SiOx interface disappears but the silicate layer extends over the whole thickness of the gadolinium oxide film. These MIS devices present lower equivalent oxide thicknesses than Pt gated devices due to interface scavenging. The density of interfacial defects Dit is found to decrease with deposition pressure, showing a reduced plasma damage of the substrate surface for higher pressures. MIS with the dielectric deposited at higher pressures also present lower flatband voltage shifts ΔVFB in the CHFVG hysteresis curves.
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62.50.-p High-pressure effects in solids and liquids
68.55.-a Thin film structure and morphology
78.30.Hv Other nonmetallic inorganics
79.60.-i Photoemission and photoelectron spectra
81.15.Cd Deposition by sputtering
85.30.Tv Field effect devices

Bipolar resistive switching in an amorphous zinc tin oxide memristive device

Jaana S. Rajachidambaram, Santosh Murali, John F. Conley, Jr., Stephen L. Golledge, and Gregory S. Herman

J. Vac. Sci. Technol. B 31, 01A104 (2013); http://dx.doi.org/10.1116/1.4767124 (6 pages)

Online Publication Date: 27 November 2012

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The integration of amorphous zinc tin oxide (ZTO) into crossbar memristor device structures has been investigated where asymmetric devices were fabricated with Al (top) and Pt (bottom) electrodes. The authors found that these devices had reproducible bipolar resistive switching with high switching ratios >104 and long retention times of >104 s. Electrical characterization of the devices suggests that both filamentary and interfacial mechanisms are important for device switching. The authors have used secondary ion mass spectrometry to characterize the devices and found that significant interfacial reactions occur at the Al/ZTO interface.
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84.32.Ff Conductors, resistors (including thermistors, varistors, and photoresistors)
84.30.Sk Pulse and digital circuits

Considerations for further scaling of metal–insulator–metal DRAM capacitors

B. Kaczer, S. Clima, K. Tomida, B. Govoreanu, M. Popovici, M.-S. Kim, J. Swerts, A. Belmonte, W.-C. Wang, V. V. Afanas'ev, A. S. Verhulst, G. Pourtois, G. Groeseneken, and M. Jurczak

J. Vac. Sci. Technol. B 31, 01A105 (2013); http://dx.doi.org/10.1116/1.4767125 (5 pages)

Online Publication Date: 27 November 2012

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Effective electron tunneling mass mtunnel is extracted from trap-assisted leakage in Sr-rich strontium titanate and rutile titanium oxide films in metal–insulator–metal (MIM) capacitors and compared with theoretical values obtained from first principles calculations of the imaginary band structure. Optimum orientations of films and stoichiometry impacting mtunnel are also discussed. Because future vertical DRAM integration schemes also stipulate maximum thickness of the MIM capacitor, mtunnel is shown to be a critical parameter influencing intrinsic leakage and potentially limiting further scaling.
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84.32.Tt Capacitors
84.30.Sk Pulse and digital circuits

Interface quality of Sc2O3 and Gd2O3 films based metal–insulator–silicon structures using Al, Pt, and Ti gates: Effect of buffer layers and scavenging electrodes

Alfonso Gómez, Helena Castán, Héctor García, Salvador Dueñas, Luis Bailón, María Ángela Pampillón, Pedro Carlos Feijoo, and Enrique San Andrés

J. Vac. Sci. Technol. B 31, 01A106 (2013); http://dx.doi.org/10.1116/1.4768678 (5 pages)

Online Publication Date: 27 November 2012

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In this work, the electrical characterization of Gd2O3 and Sc2O3-based metal–insulator–silicon (MIS) structures has been performed using capacitance–voltage, deep level transient spectroscopy, conductance transients, flat-band voltage transients, and current–voltage techniques. High-k films were deposited by high pressure sputtering using Sc and Gd metallic films in a pure Ar plasma and, subsequently, in situ room temperature plasma oxidation in a mixed Ar/O2 atmosphere was performed. Three different metals were used as gate electrodes: aluminium, platinum, and titanium, in order to check electrical differences of the samples and to check the interface scavenging after high-k dielectric deposition. In particular, it was proved that Ti electrode is a well SiO2 interlayer scavenger for both materials. Additionally, the authors observed that the predominant conduction mechanism for these high-k based-MIS structures is Poole–Frenkel emission, as usually reported for high-k dielectrics.
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73.40.Qv Metal-insulator-semiconductor structures (including semiconductor-to-insulator)
68.55.-a Thin film structure and morphology
77.55.D- High-permittivity gate dielectric films
72.20.Ht High-field and nonlinear effects

Nonhomogeneous spatial distribution of filamentary leakage current paths in circular area Pt/HfO2/Pt capacitors

Enrique Miranda, David Jiménez, Jordi Suñé, Eamon O'Connor, Scott Monaghan, Ian Povey, Karim Cherkaoui, and Paul Kennedy Hurley

J. Vac. Sci. Technol. B 31, 01A107 (2013); http://dx.doi.org/10.1116/1.4768681 (6 pages)

Online Publication Date: 27 November 2012

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Filamentary leakage current paths can occur in circular area Pt/HfO2/Pt capacitors as the result of severe electrical stress. The spatial distribution of these paths is investigated using 2D statistical methods. The filamentary paths are associated with important thermal effects occurring inside the HfO2 layer and manifest externally as a random spot pattern on the top Pt electrode. It is shown in this paper that for the devices with the largest areas significant departures from homogeneity are detected close to the peripheries of the structures. These deviations are observed as a lower density of spots than expected for a homogeneous Poisson process. Although the ultimate reason for this anomaly is still under investigation, our results demonstrate that the complete spatial randomness frequently assumed in oxide reliability analysis should not be taken for granted.
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84.32.Tt Capacitors
02.50.-r Probability theory, stochastic processes, and statistics

Influence of parasitic capacitances on conductive AFM I-V measurements and approaches for its reduction

Mathias Rommel, Joachim D. Jambreck, Martin Lemberger, Anton J. Bauer, Lothar Frey, Katsuhisa Murakami, Christoph Richter, and Philipp Weinzierl

J. Vac. Sci. Technol. B 31, 01A108 (2013); http://dx.doi.org/10.1116/1.4768679 (7 pages)

Online Publication Date: 29 November 2012

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Using conductive atomic force microscopy (cAFM), I-V characteristics on dot-like areas can be acquired to study current conduction mechanisms or dielectric breakdown statistics on the nanoscale. However, today such I-V measurements exhibit relatively low sensitivity. It is shown that parasitic capacitances Cpar in the pF range resulting from the cantilever of the probe and the probe holder limit the sensitivity of cAFM. This is proven by the evaluation of different voltage sweep rates sr and the analysis of the influence of measurement position on the sample for both, commercially available probes as well as shielded coplanar probes prepared by focused ion beam. Compared to standard probes, shielded probes show decreased displacement currents and nearly negligible transient effects for the I-V characteristics even at high sweep rates up to 10 V/s. In addition, the influence of the measurement position is much less pronounced for the shielded probes. This means, the increase of Cpar (including the probe holder) when measuring in the center of a large sample compared to measuring at the edge of the sample is around 45% for the shielded probes compared to nearly 85% for standard probes. Here, a simple data evaluation procedure is proposed to correct the measured data for the displacement current, which will strongly improve the effective sensitivity of cAFM especially for high sr, which are preferred to decrease electrical stress during the measurement. However, for higher sr, noise increases and must be reduced in future cAFM systems by additional measures.
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68.37.Ps Atomic force microscopy (AFM)
81.05.Cy Elemental semiconductors
77.22.Jp Dielectric breakdown and space-charge effects

Detailed leakage current analysis of metal–insulator–metal capacitors with ZrO2, ZrO2/SiO2/ZrO2, and ZrO2/Al2O3/ZrO2 as dielectric and TiN electrodes

Wenke Weinreich, Ahmed Shariq, Konrad Seidel, Jonas Sundqvist, Albena Paskaleva, Martin Lemberger, and Anton J. Bauer

J. Vac. Sci. Technol. B 31, 01A109 (2013); http://dx.doi.org/10.1116/1.4768791 (9 pages) | Cited 1 time

Online Publication Date: 3 December 2012

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ZrO2-based metal–insulator–metal capacitors are used in various volatile and nonvolatile memory devices as well as for buffer capacitors or radio frequency applications. Thus, process optimization and material tuning by doping is necessary to selectively optimize the electrical performance. The most common process for dielectric fabrication is atomic layer deposition which guarantees high conformity in three dimensional structures and excellent composition control. In this paper, the C–V and J–V characteristics of ZrO2 metal–insulator–metal capacitors with TiN electrodes are analyzed in dependence on the O3 pulse time revealing the optimum atomic layer deposition process conditions. Moreover, a detailed study of the leakage current mechanisms in undoped ZrO2 compared to SiO2- or Al2O3-doped ZrO2 is enclosed. Thereby, the discovered dependencies on interfaces, doping, layer thickness, and crystalline phase's enable the detailed understanding and evaluation of the most suitable material stack for dynamic random access memory devices below the 20 nm generation.
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84.32.Tt Capacitors
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)

Spectroscopic study of polysilicon traps by means of fast capacitance transients

Maria Toledano-Luque, Baojun Tang, Robin Degraeve, Ben Kaczer, Eddy Simoen, Jan Van Houdt, and Guido Groeseneken

J. Vac. Sci. Technol. B 31, 01A110 (2013); http://dx.doi.org/10.1116/1.4768682 (5 pages) | Cited 2 times

Online Publication Date: 6 December 2012

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The energy distribution of polysilicon traps is studied by means of a simple methodology based on the measurement of fast capacitance transients observed after disturbing metal/oxide/poly-Si/Si structures with positive and negative gate voltage pulses. This methodology relies on the well-known deep-level-transient spectroscopy technique. Amorphous silicon presents two defect bands at 0.31 and 0.58 eV below the conduction band whose magnitudes are significantly reduced after spike anneal. An increasing defect tail is observed toward the valance band whose magnitude can be drastically suppressed by a proper postdeposition anneal.
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71.55.Cn Elemental semiconductors
79.10.Ca Deep-level photothermal spectroscopy
71.20.Mq Elemental semiconductors

Small-signal admittance model as a characterization tool of the MOS tunnel diode

Jakub Jasiński and Bogdan Majkusiak

J. Vac. Sci. Technol. B 31, 01A111 (2013); http://dx.doi.org/10.1116/1.4769892 (7 pages) | Cited 1 time

Online Publication Date: 7 December 2012

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The tunnel leakage through the insulator layer of metal–insulator–semiconductor tunnel diodes and its small-signal admittance is investigated by means of a theoretical model of the metal–oxide–semiconductor tunnel diode based on a steady-state algorithm and the minority carrier relaxation time. The conclusions are reviewed using an experimental Al-SiO2-Si structure with an ultrathin oxide layer.
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85.30.Mn Junction breakdown and tunneling devices (including resonance tunneling devices)
72.20.Jv Charge carriers: generation, recombination, lifetime, and trapping
73.40.Qv Metal-insulator-semiconductor structures (including semiconductor-to-insulator)

Optimization of in situ plasma oxidation of metallic gadolinium thin films deposited by high pressure sputtering on silicon

María Ángela Pampillón, Pedro Carlos Feijoo, Enrique San Andrés, and María Luisa Lucía

J. Vac. Sci. Technol. B 31, 01A112 (2013); http://dx.doi.org/10.1116/1.4769893 (6 pages) | Cited 2 times

Online Publication Date: 7 December 2012

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Gadolinium oxide thin films were deposited on silicon by a two-step process: high pressure sputtering from a metallic gadolinium target followed by an in situ plasma oxidation. Several plasma conditions for metal deposition and oxidation were studied in order to minimize the growth of a SiOx layer at the interface between the high permittivity dielectric and the silicon substrate and to avoid substrate damage. Plasma emission was studied with glow discharge optical spectroscopy. The films were structurally characterized by Fourier transform infrared spectroscopy. Metal–insulator–semiconductor capacitors were fabricated with two different top metals (titanium and platinum) to analyze the influence of deposition conditions and the metal choice. Pt gated devices showed an interfacial SiOx regrowth after a forming gas annealing, while Ti gates scavenge the interface layer.
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68.55.A- Nucleation and growth
52.77.Dq Plasma-based ion implantation and deposition
77.22.Ch Permittivity (dielectric function)
81.15.Cd Deposition by sputtering
81.65.Mq Oxidation
62.50.-p High-pressure effects in solids and liquids

Characterization of HfO2/La2O3 layered stacking deposited on Si substrate

Duo Cao, Xinhong Cheng, Tingting Jia, Dawei Xu, Zhongjian Wang, Chao Xia, Yuehui Yu, and DaShen Shen

J. Vac. Sci. Technol. B 31, 01A113 (2013); http://dx.doi.org/10.1116/1.4770497 (5 pages)

Online Publication Date: 10 December 2012

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Two-layer and four-layer HfO2/La2O3 stacked structures were grown on a Si substrate by plasma enhanced atomic layer deposition at 200 °C. High resolution transmission electron microscopy results indicated that both films were amorphous with no crystals. Based on atomic force microscopy, the roughness of both films was 0.1 nm. X-ray photoelectron spectroscopy spectra indicated that the interfacial layer of the films was most likely composed of Hf-Si-O and La-Si-O. At a gate bias of |Vg − Vfb| = 1 V, the leakage current densities of the two-layer and four-layer films were 0.02 and 0.01 mA/cm2, respectively. The equivalent oxide thicknesses of the stacked structures were 1.2 and 1.5 nm, respectively. The density of interfacial states between dielectric and substrate was calculated to be 1.71 × 1012 and 1.32 × 1012 eV−1cm−2 for the two- and four-layer films, respectively.
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68.55.A- Nucleation and growth
77.55.D- High-permittivity gate dielectric films
52.77.Dq Plasma-based ion implantation and deposition
68.35.Ct Interface structure and roughness
73.40.-c Electronic transport in interface structures
81.15.Gh Chemical vapor deposition (including plasma-enhanced CVD, MOCVD, ALD, etc.)

Toward a streamlined projection of small device bias temperature instability lifetime distributions

María Toledano-Luque, Ben Kaczer, Tibor Grasser, Philippe J. Roussel, Jacopo Franco, and Guido Groeseneken

J. Vac. Sci. Technol. B 31, 01A114 (2013); http://dx.doi.org/10.1116/1.4772587 (4 pages)

Online Publication Date: 20 December 2012

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As the CMOS device dimensions shrink to nanometer scale, the time-dependent VTH variability (heteroskedasticity) becomes evident due to the reduced number of stochastically behaving traps in the gate oxide. Consequently, the bias temperature instability (BTI) lifetime of nanometer-sized devices can only be correctly described in the form of time- (or workload-) dependent distributions. This paper discusses a streamlined procedure to obtain BTI lifetime projections for nanometer-scaled devices from the combination of measurements of a small sample set of nanoscaled devices and several large area test devices.
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85.30.De Semiconductor-device characterization, design, and modeling

High pressure sputtering as a viable technique for future high permittivity dielectric on III–V integration: GdOx on InP demonstration

María Ángela Pampillón, Carmina Cañadilla, Pedro Carlos Feijoo, Enrique San Andrés, and Álvaro del Prado

J. Vac. Sci. Technol. B 31, 01A115 (2013); http://dx.doi.org/10.1116/1.4771970 (5 pages) | Cited 2 times

Online Publication Date: 21 December 2012

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The electrical properties of metal–oxide–semiconductor devices based on GdOx obtained by high pressure sputtering on InP substrates are studied. In order to prevent damage of the semiconductor substrate, an optimized two-step sputtering procedure has been used for the high permittivity dielectric deposition. First, a thin metallic Gd film was sputtered using a metallic Gd target and a pure Ar plasma. Then, without extracting the sample from the system, the GdOx films were obtained by plasma oxidation using an Ar/O2 mixed atmosphere and reducing plasma power to minimize damage and interfacial regrowth. The resulting devices show fully functional capacitance curves. After forming gas annealing, the capacitors do not show interface regrowth up to a temperature of 500 °C and the gate leakage stays within reasonable limits, below 2 × 10−4 Acm−2 at a gate voltage of 1.5 V. In addition, the interface trap density remains roughly constant with annealing temperature up to 400 °C, in the low 1013 eV−1cm−2 range, decreasing for higher temperatures. At 550 °C, the trap density is very low, under the detection limit of the conductance technique, but the devices show a severe capacitance reduction.
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84.32.Tt Capacitors
85.30.Tv Field effect devices

Electrical instability in LaLuO3 based metal–oxide–semiconductor capacitors and role of the metal electrodes

Rosario Rao and Fernanda Irrera

J. Vac. Sci. Technol. B 31, 01A116 (2013); http://dx.doi.org/10.1116/1.4774105 (5 pages)

Online Publication Date: 7 January 2013

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Trapping in LaLuO3 MOS capacitors with different metal nitride gates is investigated for the first time. The instability of the flat band voltage during electrical stress is monitored systematically with the pulsed C-V technique as function of stress time and voltage. Ad-hoc experiments aiming to force electron trapping in sites close to the metal/high-k interface are performed, and the role of different metal nitride gates is discussed. Trapping exhibits a power-law dependence on stress time in any investigated condition. Interpolation of the experimental data with an analytical model of trapping allows extraction of the energy level of traps involved in the capture mechanism.
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84.32.Tt Capacitors

Perimeter and area current components in HfO2 and HfO2−x metal-insulator-metal capacitors

Francesco Maria Puglisi, Paolo Pavan, Andrea Padovani, and Luca Larcher

J. Vac. Sci. Technol. B 31, 01A117 (2013); http://dx.doi.org/10.1116/1.4774104 (5 pages)

Online Publication Date: 8 January 2013

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In this paper, the authors present an experimental analysis on current conduction mechanisms in high-k oxides, where two metal–insulator–metal structures with different insulators (HfO2 and HfO2−x) are considered. Current density measurements indicate the existence of a perimeter-related component in the current, sizeable in HfO2, and negligible in HfO2−x samples, which have to be taken into account for a correct analysis of the device behavior and cannot be based only on the area scaling rules. For oxide breakdown, for example, a significant contribution of the perimeter-related current component results in conservative extrapolations of breakdown voltages for scaled devices.
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84.32.Tt Capacitors

Local oxide capacitance as a crucial parameter for characterization of hot-carrier degradation in long-channel n-MOSFETs

Ivan Starkov and Hubert Enichlmair

J. Vac. Sci. Technol. B 31, 01A118 (2013); http://dx.doi.org/10.1116/1.4774106 (7 pages)

Online Publication Date: 9 January 2013

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A theoretical model for the MOSFET local oxide capacitance as a crucial parameter for the characterization of hot-carrier degradation has been developed. For this purpose, the conformal mapping technique is used. On the basis of the proposed approach a refined extraction scheme for the defect distribution from charge-pumping measurements has been employed. Assuming the extracted spatial trap distributions at different stress times as input, the transfer characteristics and linear drain current degradation are numerically calculated and compared with the experimental results. A very good agreement is achieved. These results demonstrate that the coordinate dependence of the oxide capacitance is extremely important for an accurate extraction of the defect profile particularly for large stress times. Additionally, the obtained results confirm the findings of our physics-based model of hot-carrier degradation.
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85.30.Tv Field effect devices
85.30.De Semiconductor-device characterization, design, and modeling

Effects of alternating current voltage amplitude and oxide capacitance on mid-gap interface state defect density extractions in In0.53Ga0.47As capacitors

Scott Monaghan, Éamon O'Connor, Ian M. Povey, Brendan J. Sheehan, Karim Cherkaoui, Barry J. A. Hutchinson, Paul K. Hurley, Fahmida Ferdousi, Rafael Rios, Kelin J. Kuhn, and Anisur Rahman

J. Vac. Sci. Technol. B 31, 01A119 (2013); http://dx.doi.org/10.1116/1.4774109 (8 pages) | Cited 1 time

Online Publication Date: 9 January 2013

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This work looks at the effect on mid-gap interface state defect density estimates for In0.53Ga0.47As semiconductor capacitors when different AC voltage amplitudes are selected for a fixed voltage bias step size (100 mV) during room temperature only electrical characterization. Results are presented for Au/Ni/Al2O3/In0.53Ga0.47As/InP metal–oxide–semiconductor capacitors with (1) n-type and p-type semiconductors, (2) different Al2O3 thicknesses, (3) different In0.53Ga0.47As surface passivation concentrations of ammonium sulphide, and (4) different transfer times to the atomic layer deposition chamber after passivation treatment on the semiconductor surface—thereby demonstrating a cross-section of device characteristics. The authors set out to determine the importance of the AC voltage amplitude selection on the interface state defect density extractions and whether this selection has a combined effect with the oxide capacitance. These capacitors are prototypical of the type of gate oxide material stacks that could form equivalent metal–oxide–semiconductor field-effect transistors beyond the 32 nm technology node. The authors do not attempt to achieve the best scaled equivalent oxide thickness in this work, as our focus is on accurately extracting device properties that will allow the investigation and reduction of interface state defect densities at the high-k/III–V semiconductor interface. The operating voltage for future devices will be reduced, potentially leading to an associated reduction in the AC voltage amplitude, which will force a decrease in the signal-to-noise ratio of electrical responses and could therefore result in less accurate impedance measurements. A concern thus arises regarding the accuracy of the electrical property extractions using such impedance measurements for future devices, particularly in relation to the mid-gap interface state defect density estimated from the conductance method and from the combined high–low frequency capacitance–voltage method. The authors apply a fixed voltage step of 100 mV for all voltage sweep measurements at each AC frequency. Each of these measurements is repeated 15 times for the equidistant AC voltage amplitudes between 10 mV and 150 mV. This provides the desired AC voltage amplitude to step size ratios from 1:10 to 3:2. Our results indicate that, although the selection of the oxide capacitance is important both to the success and accuracy of the extraction method, the mid-gap interface state defect density extractions are not overly sensitive to the AC voltage amplitude employed regardless of what oxide capacitance is used in the extractions, particularly in the range from 50% below the voltage sweep step size to 50% above it. Therefore, the use of larger AC voltage amplitudes in this range to achieve a better signal-to-noise ratio during impedance measurements for future low operating voltage devices will not distort the extracted interface state defect density.
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84.32.Tt Capacitors
85.30.Tv Field effect devices

Transport through singlet states in resistive memory materials: Magneli-phase, TinO2n−1 for 9 ≥ n > 3, and TiO2-HfO2 alloys

Gerald Lucovsky and Jinwoo Kim

J. Vac. Sci. Technol. B 31, 01A120 (2013); http://dx.doi.org/10.1116/1.4774101 (10 pages)

Online Publication Date: 14 January 2013

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Energy states in the forbidden band-gap below the conduction band edge are active as electron traps in nanograin high dielectric constant (κ) transition metal (TM) oxides, e.g., ZrO2 and HfO2. These TM oxides have received considerable attention for at least 10 yr as gate-dielectrics in complementary metal oxide semiconductor devices. More recently, they are emerging as candidates for charge storage and memory devices. To provide a theoretical basis for device applications, this article combines ab initio many-electron theory and x-ray absorption spectroscopy to study O K edge and TM core level transitions. These studies allow the extraction of ligand field splittings (ΔLF) for defect state features, which can then be compared with those obtained from O and TM core spectroscopic transitions, thereby providing an increased understanding of intrinsic defect bonding arrangements. These comparisons have been made for (i) elemental Ti-oxides TiO2 and Ti2O3 with different formal charge state, Ti4+ and Ti3+, respectively, and for (ii) Ti Magneli-phase alloys, TinO2n−1, n is an integer 9 ≥ n > 3, (TiO2)x(HfO2)1−x alloys. The alloys display multivalent behavior, with additional valence states associated with bond-strain, and metallic hopping transport of electrons through singlet exited states immediately below the conduction band edge. Three significant new results have been highlighted in this article. First based on comparisons with noncrystalline SiO2 and GeO2, the intrinsic defects in TM oxides have been identified as pairs of singly occupied dangling bonds in vacated (empty) O-atom bonding sites. Second, the ordering and symmetries of two-electron features identified in second derivative O K pre-edge spectra have been compared with d2 transitions described by Tanabe–Sugano diagrams. These splitting are dependent on bonding coordination and symmetry of the bordering TM atoms, sixfold octahedral arrangements for Ti, and eightfold arrangements for ZrO2 and HfO2 in cubic and tetragonal phases. ΔLF values obtained from these studies are the core level spectroscopies and defects. For the defect states, there is medium range order that extends to third and fourth nearest-neighbor TM metal–atom correlations. Finally, and equally important, these results establish that bonding defects in TM nanograin oxides and noncrystalline SiO2 and GeO2 are qualitatively similar, each indicative of different values of ΔLF and indicating different levels of partially ionic bonding.
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71.20.Ps Other inorganic compounds
71.55.Ht Other nonmetals
72.20.Ee Mobility edges; hopping transport
72.20.Jv Charge carriers: generation, recombination, lifetime, and trapping
77.22.Ch Permittivity (dielectric function)
78.70.Dm X-ray absorption spectra

Noncrystalline SiO2 and GeO2: Process induced pre-existing defects and vacated O-atom intrinsic bonding sites

Gerald Lucovsky, Jinwoo Kim, Kun Wu, and Daniel Zeller

J. Vac. Sci. Technol. B 31, 01A121 (2013); http://dx.doi.org/10.1116/1.4773923 (6 pages)

Online Publication Date: 16 January 2013

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Electron spin resonance (ESR) studies on bulk-quenched, noncrystalline (nc-) silica glasses (henceforth, nc-SiO2) have distinguished between (1) pre-existing process-induced defects introduced either after growth or annealing at high temperatures and (2) x-ray or γ-ray radiation or energetic electron particle-created defects. The ESR activity in these pre-existing defects is activated by x-rays. Similar pre-exiting defects have been demonstrated for remote plasma-deposited thin films of nc-SiO2 and nc-GeO2. Concentrations of pre-existing defects increase exponentially with increasing quenching and annealing temperatures. This is always the case for so-called “dry silicas” with no detectable Si–OH bonding. Nonbonding O-hole centers or nonbonding O-associated hole centers are also detected in dry silicas but only after significant x-ray, γ-ray, or energetic electron irradiation. Pre-existing defect has also been detected by second derivative O K pre-edge x-ray absorption spectroscopy in thermally grown and remote plasma-deposited nc-SiO2 and nc-GeO2 thin films. These spectra display singlet and triplet features that can be symmetry state labeled according to Tanabe–Sugano diagrams. This is demonstrated by combining ab initio theory and experiment by identifying the pre-existing defects as vacated O-atom sites in which an O-atom has never been resident.
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68.55.at Other materials
52.77.Dq Plasma-based ion implantation and deposition
61.80.Cb X-ray effects
76.30.-v Electron paramagnetic resonance and relaxation
78.70.Dm X-ray absorption spectra
81.40.Gh Other heat and thermomechanical treatments